SI2107-X-FM SILABS [Silicon Laboratories], SI2107-X-FM Datasheet - Page 8
SI2107-X-FM
Manufacturer Part Number
SI2107-X-FM
Description
SATELLITE RECEIVER FOR DVB-S/DSS WITH QUICKLOCK AND QUICKSCAN
Manufacturer
SILABS [Silicon Laboratories]
Datasheet
1.SI2107-X-FM.pdf
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Table 7. I
Si2107/08/09/10
8
SCL Clock Frequency
Bus Free Time between START and
STOP Condition
Hold Time (repeated) START Condition.
(After this period, the first clock pulse is
generated.)
LOW Period of SCL Clock
HIGH Period of SCL Clock
Data Setup Time
Data Hold Time
SCL and SDA Rise and Fall Time
Setup Time for a Repeated START Con-
dition
Setup Time for STOP Condition
Capacitive Load for each Bus Line
SDA
SCL
t
f
S
2
C Bus Characteristics
Parameter
t
LOW
t
HD;STA
t
r
t
HD;DAT
t
SU;DAT
t
HIGH
Figure 1. I
t
f
Preliminary Rev. 0.81
Symbol
t
t
t
t
t
HD, STA
SU, DAT
HD, DAT
SU, STA
SU,STO
t
t
f
t
HIGH
LOW
t
SCL
BUF
C
r,
B
t
2
f
C Timing Diagram
t
SU;STA
S
Test Condition
r
t
HD;STA
Min
100
1.3
0.6
1.3
0.6
0.6
0.6
—
—
t
0
0
SP
t
SU;STO
Typ
—
—
—
—
—
—
—
—
—
—
—
t
r
P
Max
400
300
400
0.9
—
—
—
—
—
—
—
t
BUF
S
Unit
kHz
µs
µs
µs
µs
µs
µs
µs
pF
ns
ns
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