ZL30402/QCC ZARLINK [Zarlink Semiconductor Inc], ZL30402/QCC Datasheet - Page 11

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ZL30402/QCC

Manufacturer Part Number
ZL30402/QCC
Description
SONET/SDH Network Element PLL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
All clocks and frame pulses except the C155 are output with CMOS logic levels. The C155 clock (155.52MHz) is
output in a standard LVDS format.
2.5
The ZL30402 provides three control registers dedicated to programming the output clock phase offset. Clocks
C16o, C8o, C4o and C2o and frame pulses F16o, F8o, F0o are derived from 16.384 MHz and can be jointly shifted
with respect to an active reference clock by up to 125 µs with a step size of 61 ns. The required phase shift of
clocks is programmable by writing to the Phase Offset Register 2 ("Table 8") and to the Phase Offset Register 1
("Table 9"). The C1.5o clock can be shifted as well in step sizes of 81ns by programming C1.5POA bits in Control
Register 3 ("Table 11").
The coarse phase adjustment is augmented with a very fine phase offset control on the order of 477 ps per step.
This fine adjustment is programmable by writing to the Fine Phase Offset Register (Table 15 "Fine Phase Offset
Register (R/W)"). The offset moves all clocks and frame pulses generated by ZL30402 including C155 clock.
2.6
2.6.1
Any Network Element that operates in a synchronous network must support three Clock Modes: Free-run, Normal
(Locked) and Holdover. These clock modes determine behavior of a Network Element to the unforeseen changes in
the network synchronization hierarchy. Requirements for Clock Modes are defined in the international standards
e.g.: G.813, GR-1244-CORE and GR-253-CORE and they are very strictly enforced by network operators. The
ZL30402 supports all clock modes and each of these modes have a corresponding state in the Control State
Machine.
2.6.2
The ZL30402 Control State Machine is a complex combination of many internal states supporting the three
mandatory clock modes. The simplified version of this state machine is shown in Figure 5 and it includes the
mandatory states: Free-run, Normal and Holdover. These three states are complemented by two additional states:
Reset and Auto Holdover, which are critical to the ZL30402 operation under the changing external conditions.
Output Clocks Phase Adjustment
Control State Machine
Clock Modes
ZL30402 State Machine
C155 Output
C155 Output
155.52
E3DS3/OC3
0
Figure 4 - C19o, C155o, C34/C44 Clock Generation Options
HIZ
1
Dejittered
Zarlink Semiconductor Inc.
19.44
C19o Output
0
E3DS3/OC3
ZL30402
11
19.44
1
0
1
C34/44 Output
11.184
8.592
E3DS3/OC3
E3DS3/OC3
0
44.736
34.368
1
Data Sheet

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