ZL50073GAC ZARLINK [Zarlink Semiconductor Inc], ZL50073GAC Datasheet - Page 45

• Manufacturer Part Number: ZL50073GAC
• Description: 32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps)
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

The Group Control Register is a static control register. Changes to bit settings may disrupt data flow on the selected
port for a maximum of 2 frames.
15 - 10
31
15
8 - 4
3 - 2
1 - 0
External Read/Write Address: 40200
Reset Value: 000C000C
0
0
Bit
9
30
14
0
0
ISSRC1 - 0
29
13
ISPD4 - 0
ISBR1 - 0
0
0
Unused
Name
ISI
28
12
0
0
H
27
11
0
0
Reserved. In normal functional mode, these bits MUST be set to zero.
Input Stream Inversion
For normal operation, this bit is set low.
To invert the input stream, set this bit high.
Input Sampling Point Delay
Default Sampling Point is 3/4. Adjust according to Figure 5 on page 20.
Input Stream Bit Rate
Unused streams must be connected to ground.
If the internal system clock is used as the clock source, all the above data rates are
available. Otherwise, the data rate cannot exceed the selected clock source’s rate.
Input Stream Clock Source Select
26
10
0
0
Table 25 - Group Control Register (continued)
H
ISBR1 - 0
ISSRC1 - 0
- 4027F
25
00
01
10
ISI
11
0
9
00
01
10
11
H
ISPD
24
8
0
4
Zarlink Semiconductor Inc.
16.384 Mbps
32.768 Mbps
65.536 Mbps
8.192 Mbps
STi/oA
ISPD
ZL50073
23
0
7
3
Internal System Clock
Input Timing Source
45
CKi0 and FPi0
CKi1 and FPi1
CKi2 and FPi2
ISPD
OSI
22
6
2
16.384 Mbps
32.768 Mbps
8.192 Mbps
Description
OSBA 1 OSBA 0 OSBR 1
Not Used
ISPD
STi/oB
21
5
1
Bit Rates Per Group
ISPD
20
4
0
ISBR
16.384 Mbps
8.192 Mbps
19
3
1
Not Used
Not Used
STi/oC
OSBR 0
ISBR
18
2
0
OSSRC 1
ISSRC
16.384 Mbps
8.192 Mbps
17
1
1
Not Used
Not Used
STi/oD
Data Sheet
OSSRC 0
ISSRC
16
0
0