ZL50074GAC ZARLINK [Zarlink Semiconductor Inc], ZL50074GAC Datasheet - Page 14

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ZL50074GAC

Manufacturer Part Number
ZL50074GAC
Description
32 K x 32 K Channel TDM Switch with 128 Input and 128 Output Streams
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
The ZL50074 uses the ST-BUS/GCI-Bus master input frame pulse (FPi0) and the ST-BUS/GCI-Bus master input
clock (CKi0) to define the input frame boundary and timing for sampling the ST-BUS/GCI-Bus input streams. The
rate of the input clock is defined by setting the CK_SEL1 - 0 pins. In addition, two more frame pulses and clocks can
be accepted. The frequencies of these signals are automatically detected by the ZL50074.
A selectable Motorola or Intel compatible non-multiplexed microprocessor port allows users to program the device
to operate in various modes under different switching configurations. Users can use the microprocessor port to
perform internal register and memory read and write operations. The microprocessor port can be selectable to be
either a 32 bit or 16 bit data bus and to have either a 19 bit or 17 bit address bus. This is selected by setting the
D16B pin. There are seven control signals (CS, DS, R/W, DTA, WAIT, BERR and IM).
The device supports the mandatory requirements for the IEEE 1149.1 (JTAG) standard via the test port.
1.2
The ZL50074 switches 64 kbps and Nx64 kbps data and voice channels from the TDM input streams, to timeslots
in the TDM output streams. The device is non-blocking; all 32 K input channels can be switched through to the
outputs. Any input channel can be switched to any available output channel. The maximum switching capacity and
the number of channels per stream are shown in Table 1 for different data rates of operation.
1.3
The ZL50074 is a large switch with a comprehensive list of user configurable, ’per-group’ programmable features.
In order to facilitate ease of use, the ZL50074 offers a simple programming model. Streams are grouped in sets of
four, with each group sharing the same configured characteristics. In this way it is possible to reduce programming
complexity, while still maintaining flexible ’per-group’ configuration options:
There are 32 input and 32 output groups. Depending on the data rate set for the device there will be either 1, 2 or 4
streams activated in each group. If the data rate is set for 65.536 Mbps, the ‘A’ streams will be activated; the ‘B’, ‘C’
and ‘D’ streams will not be activated. If the data rate is set for 32.768 Mbps, the ‘A’ and ‘B’ streams will be activated;
the ‘C’ and ‘D’ streams will not be activated. If the data rate is set for 16.384 Mbps or 8.192 Mbps, the ‘A’, ‘B’, ‘C’
and ‘D’ streams will all be activated. The maximum channel capacity of a group is 1024 channels when operating at
any data rate except for 8.192 Mbps, in which case the maximum operating channel capacity decreases to 512
channels.
TDM Stream Data
Input stream clock source selection, see Section 2.0
Output stream clock source selection, see Section 2.0
Input stream sampling point selection, see Section 5.1
Output stream fractional bit advance, see Section 5.2
Input and output stream inversion control; see Section 12.3
Switching Configuration
Stream Provisioning
65 Mbps
32 Mbps
16 Mbps
8 Mbps
Rate
TDM Data Streams
Number of Input
128
128
Table 1 - Data Rate and Maximum Switch Size
32
64
TDM Data Streams
Number of Output
Zarlink Semiconductor Inc.
ZL50074
128
128
32
64
14
64 kbps Channels
per Stream
Number of
1024
512
256
128
Capacity (streams x
32 x 1024 = 32,768
128 x 256 = 32,768
128 x 128 = 16,384
Maximum Switch
64 x 512 = 32,768
channels = total)
Data Sheet

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