ZL50074GAC ZARLINK [Zarlink Semiconductor Inc], ZL50074GAC Datasheet - Page 51

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ZL50074GAC

Manufacturer Part Number
ZL50074GAC
Description
32 K x 32 K Channel TDM Switch with 128 Input and 128 Output Streams
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
AC Electrical Characteristics - Output Clock Jitter Generation
Note 1:
Note 2:
No.
1
2
3
4
CKi at 8 MHz, output clock source set to internal APLL. No jitter presented on the Cki0 input.
For 65.536 MHz output clock, the total loading on the output should not be larger than 10pF.
Output Frame Boundary
Output Frame Boundary
Jitter at CKO0-3 (8.192 MHz)
Jitter at CKO0-3 (16.384 MHz)
Jitter at CKO0-3 (32.768 MHz)
Jitter at CKO0-3 (65.536 MHz)
FPo0-3
CKo0-3
FPo0-3
CKo0-3
Figure 10 - ST-Bus Frame Pulse and Clock Output Timing
Characteristic
t
t
FPOS
FPOS
Figure 11 - GCI Frame Pulse and Clock Output Timing
t
t
FPOH
FPOH
Zarlink Semiconductor Inc.
ZL50074
51
1050
1030
Max.
920
810
t
t
CKOP
CKOP
Units
ps-pp
ps-pp
ps-pp
ps-pp
Notes
Data Sheet
1,2

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