ZL50233GDC ZARLINK [Zarlink Semiconductor Inc], ZL50233GDC Datasheet - Page 15
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ZL50233GDC
Manufacturer Part Number
ZL50233GDC
Description
4 Channel Voice Echo Cancellor
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50233GDC.pdf
(37 pages)
Data Sheet
Note: Refer to Figure 12 and Figure 13 for timing details.
F0i
ST-BUS
F0i
GCI interface
Rin/Sin
Rout/Sout
Byte
0Dh
1Bh
1Dh
0Fh
1Fh
11h
13h
15h
17h
19h
MS
Address +
-
-
-
-
-
-
-
-
-
-
-
-
Base
Figure 9 - ST-BUS and GCI Interface Channel Assignment for 2Mb/s Data Streams
Byte
0Ah
0Bh
0Ch
0Eh
1Ah
1Ch
1Eh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
10h
12h
14h
16h
18h
Table 3 - Memory Mapping of Per Channel Control and Status Registers
LS
Error Peak Detect Reg
0
Decay Step Size Reg
Channels
Rin Peak Detect Reg
Sin Peak Detect Reg
15.625 sec
Decay Step Number
Active
Echo Canceller A
1 2 3
Flat Delay Reg
Step Size, MU
Control Reg 1
Control Reg 2
Control Reg 3
Control Reg 4
Noise Scaling
Noise Control
Status Reg
DTDT Reg
Reserved
Reserved
Reserved
Reserved
Reserved
NLPTHR
Gains
Zarlink Semiconductor Inc.
125 sec
Byte
2Dh
3Bh
3Dh
2Fh
31h
33h
35h
37h
39h
3Fh
MS
Address +
Disabled Channels with Random Data
-
-
-
-
-
-
-
-
-
-
-
-
Base
Byte
2Ch
3Ch
3Eh
20h
21h
22h
23h
24h
25h
26h
27h
28h
29h
2Ah
2Bh
2Eh
30h
32h
34h
36h
38h
3Ah
LS
Error Peak Detect Reg
Decay Step Size Reg
Rin Peak Detect Reg
Sin Peak Detect Reg
Decay Step Number
Echo Canceller B
Flat Delay Reg
Step Size, MU
Control Reg 1
Control Reg 2
Control Reg 3
Control Reg 4
Noise Scaling
Noise Control
Status Reg
DTDT Reg
Reserved
Reserved
Reserved
Reserved
Reserved
NLPTHR
Gains
ZL50233
15