ZL50400GDC ZARLINK [Zarlink Semiconductor Inc], ZL50400GDC Datasheet - Page 21

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ZL50400GDC

Manufacturer Part Number
ZL50400GDC
Description
Lightly Managed/Unmanaged 9-Port 10/100 M Ethernet Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
In lightly managed mode, the default configuration can be used as well, however, the device needs to be told when
to start switching. This is done via the “Init Complete” bit, set in GCR[4]. The default settings can be overridden
using the CPU interface, but should be done before setting of GCR[4]. One thing to note is after reset, the device
will start to initialize the control tables. Therefore, a short delay (100 us~1 ms) is necessary before changing the
register settings and/or control tables, and before setting GCR[4].
System Defaults
Per-port Defaults
Uplink Port
-
-
-
CPU MAC address is 00-00-00-00-00-00
Forward MAC addresses 01-80-C2-00-00-00~FF to CPU port
-
All interrupts enabled
MAC address learn report to CPU disabled
Statistics counters disabled
DiffServ EF code support disabled
No VLAN ID hashing
FE Ports
-
CPU Port
-
-
-
MII mode
Auto-negotiate 100M/Full Duplex/Flow Control
per-source port buffer pool of 384 buffers, with flow control threshold of 192 buffers
Except 01-80-C2-00-00-01~F, which are dropped
Link heart beat disabled
100M/Full Duplex/Flow Control
8-byte header padding
per-source port buffer pool of 96 buffers, with flow control threshold of 48 buffers
Zarlink Semiconductor Inc.
ZL50400
21
Data Sheet

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