SY89841UMG Micrel Inc, SY89841UMG Datasheet - Page 9

• Manufacturer Part Number: SY89841UMG
• Description: IC MUX 2:1 LVDS RPE 16-MLF
• Manufacturer: Micrel Inc
• Type: Multiplexerr
• Series: SY89r

Specifications of SY89841UMG

• Circuit: 1 x 2:1
• Independent Circuits: 1
• Voltage Supply Source: Single Supply
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-MLF®, QFN
• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Logic Level: LVDS
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5V
• Operating Supply Voltage (max): 2.625V
• Package Type: MLF
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: CML/LVDS/PECL
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-2095-5; SY89841UMG

Micrel, Inc.
Case #2: Input Clock Failure: Switching from a
selected clock stuck HIGH to a valid clock (RPE
enabled).
If CLK1 fails HIGH before the RPE MUX selects
CLK2 (using the SEL pin), the switchover will occur
in three stages.
Note: Output show extended clock cycle during switchover. Pulse width for both high and low of this cycle will always be
greater than 50% of the CLK2 period.
Case #3: Input Clock Failure: Switching from a
selected clock stuck Low to a valid clock (RPE
enabled).
If CLK1 fails LOW before the RPE MUX selects
CLK2 (using the SEL pin), the switchover will occur
in two stages.
February 2005
OUTPUT
CLK1
CLK2
SEL
OUTPUT
CLK1
CLK2
SEL
Select CLK1
Runt pulse eliminated
from output
Select CLK1
Stage 1
Timing Diagram 2
Timing Diagram 3
14 to 16 falling edges of CLK2
13 to 17 falling edges of CLK2
9
• Stage 1: The output will remain HIGH for a
• Stage 2: The output will switch to LOW and then
• Stage 3: The output will follow CLK2.
• Stage 1: The output will remain LOW for a
• Stage 2: The output will follow CLK2.
limited number of pulses of CLK2.
remain LOW for a limited number of falling edges
of CLK2.
limited number of falling edges of CLK2.
Stage 1
Select CLK2
Select CLK2
Stage 2
[e-mail]
Stage 3
Stage 2
or [phone]
M9999-021405
SY89841U