TFRA84J13DS0 AGERE [Agere Systems], TFRA84J13DS0 Datasheet - Page 12

• Manufacturer Part Number: TFRA84J13DS0
• Description: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
• Manufacturer: AGERE [Agere Systems]

Product Description, Revision 4
April 29, 2005
The DS1 and E1 test patterns can be transmitted as either
unframed or as the payload of a framed signal, as defined
in ITU-T Recommendation O.150. DS2 patterns are
unframed only.
Under register control, single bit-errors can be injected into
any test pattern.
5.5 Clock Generator (CG)
The clock generator block may be used optionally to over-
ride the device configuration specified by the
MODE[2:0]_PLL device pins. If the block is not provisioned,
the default mode will generate all the necessary FRM block
PDH clocks, based upon the logic states on the
MODE[2:0]_PLL pins (see the Ultraframer Hardware
Design Guide).
5.6 Framer (FRM)
The DS1/J1/E1 framer block’s (three per device) internal
components are described in the following sections. A par-
ticular application will determine which of the components
within the framer are used.
5.6.1 Line Decoder/Encoder
The line decoder/encoder supports either single-rail or
dual-rail transmission. In dual-rail mode, the line codes
supported are as follows:
In the single-rail mode, a line interface unit (LIU) decodes/
encodes the data. In the dual-rail mode, loss-of-signal is
monitored.
In the case of coded mark inversion (CMI) coding (Japa-
nese TTC standard JJ-20.11), the LIU decodes the data,
listing both the CMI coding rule violations (CRVs) and line
coding violations as bipolar violations. (In the CMI mode,
the framer is in the single-rail mode.)
Note: Dual-rail mode is only supported for up to 18 DS1/E1
5.6.2 Receive Frame Aligner/Transmit Frame Formatter
The receive frame aligner and transmit frame formatter
support the following frame formats:
Agere Systems Inc.
Alternate mark inversion (AMI)
DS1 binary 8 zero code suppression (B8ZS)
ITU-CEPT high-density bipolar of order three (HDB3)
D4 superframe
SF D4 superframe: F
J-D4 superframe with Japanese remote alarm
channels (out of 84/63).
T
framing only
5.6.3 Receive Performance Monitor
The receive performance monitor detects the following
alarms:
Note: Only available on up to 18 individual DS1/E1
These alarms are detected as defined by the appropriate
ANSI, AT&T, ITU, and ETSI standards. Performance moni-
toring, as specified by AT&T, ANSI, and ITU, is provided
through counters monitoring the following:
Note: Only available on up to 18 individual DS1/E1
In-band loopback activation and deactivation codes can be
transmitted to the line via the payload or the facility data
link. In-band loopback activation and deactivation codes in
the payload or the facility data link are detected.
DDS
SLC-96
ESF
J-ESF (J1 standard with different CRC-6 algorithm)
Nonalign DS1 (193 bits—clear channel)
CEPT basic frame (ITU G.706)
CEPT CRC-4 multiframe with 100 ms timer (ITU G.706)
CEPT CRC-4 multiframe with 400 ms timer (automatic
CRC-4/non-CRC-4 equipment interworking) (ITU G.706
Annex B)
Nonalign E1 (256 bits—clear channel)
2.048 coded mark inversion (CMI) coded interface (TTC
standards JJ-20.11)
Loss of receive clock
Loss-of-signal
Loss-of-frame
Alarm indication signal (AIS)
Remote frame alarms
Remote multiframe alarms
Bipolar violations
Frame bit errors
CRC errors
Errored events
Errored seconds
Bursty errored seconds
Severely errored seconds
channels in dual-rail mode.
channels.
DS3/E3/DS2/E2/DS1/E1/DS0
TFRA84J13 Ultraframer
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