K9F1208D0A SAMSUNG [Samsung semiconductor], K9F1208D0A Datasheet - Page 21
K9F1208D0A
Manufacturer Part Number
K9F1208D0A
Description
64M x 8 Bit , 32M x 16 Bit NAND Flash Memory
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.K9F1208D0A.pdf
(46 pages)
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K9F1208D0A
K9F1208U0A
Figure 8. Read Operation with CE don’ t-care.
System Interface Using CE don’ t-care.
For an easier system interface, CE may be inactive during the data-loading or sequential data-reading as shown below. The internal
528byte 1264word page registers are utilized as separate buffers for this operation and the system design gets more flexible. In addi-
tion, for voice or audio applications which use slow cycle time on the order of u-seconds, de-activating CE during the data-loading and
reading would provide significant savings in power consumption.
Figure 7. Program Operation with CE don’ t-care.
CLE
CE
WE
ALE
I/O
CE
WE
CLE
ALE
R/B
I/O
CE
WE
RE
X
X
t
CS
00h
80h
K9F1216D0A
K9F1216U0A
Start Add.(4Cycle)
Start Add.(4Cycle)
t
WP
On K9F1208U0A-Y,P,V,F or K9F1208D0A-Y,P
CE must be held
low during tR
t
CH
t
R
Data Input
21
I/O
CE
RE
X
CE don’ t-care
t
CE don’ t-care
Data Output(sequential)
CEA
t
REA
FLASH MEMORY
Data Input
out
10h
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