K9F1G08U0A SAMSUNG [Samsung semiconductor], K9F1G08U0A Datasheet - Page 7

• Manufacturer Part Number: K9F1G08U0A
• Description: 128M x 8 Bit / 256M x 8 Bit NAND Flash Memory
• Manufacturer: SAMSUNG [Samsung semiconductor]

K9F1G08R0A
K9F1G08U0A
Figure 1-1. K9F1G08X0A Functional Block Diagram
Figure 2-1. K9F1G08X0A Array Organization
V
V
(=1,024 Blocks)
64K Pages
CC
SS
NOTE : Column Address : Starting Address of the Register.
2nd Cycle
CE
RE
WE
3rd Cycle
1st Cycle
4th Cycle
Command
A
A
* L must be set to "Low".
* The device ignores any additional input of address cycles than required.
12
0
K9K2G08U1A
- A
- A
11
27
I/O 0
A
A
A
A
12
20
0
8
CLE
& High Voltage
2K Bytes
Page Register
Control Logic
2K Bytes
X-Buffers
Latches
& Decoders
Y-Buffers
Latches
& Decoders
Command
Generator
ALE PRE
Register
I/O 1
A
A
A
A
13
21
1
9
I/O 2
A
A
A
WP
A
10
14
22
2
64 Bytes
64 Bytes
I/O 3
A
A
A
A
11
15
23
3
7
I/O 4
A
A
A
*L
16
24
I/O 0 ~ I/O 7
4
Global Buffers
(2048 + 64)Byte x 65536
Data Register & S/A
I/O Buffers & Latches
I/O 5
1024M + 32M Bit
Cache Register
A
A
A
*L
17
25
NAND Flash
5
8 bit
Y-Gating
ARRAY
1 Block = 64 Pages
(128K + 4k) Byte
1 Page = (2K + 64)Bytes
1 Block = (2K + 64)B x 64 Pages
1 Device = (2K+64)B x 64Pages x 1024 Blocks
I/O 6
A
A
A
*L
18
26
6
= (128K + 4K) Bytes
= 1056 Mbits
I/O 7
A
A
A
*L
FLASH MEMORY
19
27
7
Output
Driver
Row Address
Row Address
Column Address
Column Address
V
V
CC
SS
I/0 7
I/0 0