MT54W1MH36B-4 MICRON [Micron Technology], MT54W1MH36B-4 Datasheet - Page 18
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MT54W1MH36B-4
Manufacturer Part Number
MT54W1MH36B-4
Description
Manufacturer
MICRON [Micron Technology]
Datasheet
1.MT54W1MH36B-4.pdf
(27 pages)
NOTE:
36Mb: 1.8V V
MT54W2MH18B_A.fm - Rev 9/02
1. Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following
2. Outputs are disabled (High-Z) one clock cycle after a NOP.
3. In this example, if address A0 = A1, then data Q00 = D10, Q01 = D11. Write data is forwarded immediately as read results.
A0, i.e., A0 + 1.
CQ#
W#
CQ
K#
R#
C#
A
D
Q
K
C
DD
1
A0
D10
, HSTL, QDRIIb2 SRAM
READ
t KHCH
t KHKL
(Note 3)
t AVKH t KHAX
t KHKL
D11
A1
2
WRITE
t
IVKH
t KLKH
t AVKH t KHAX
t KLKH
t KHCH
D30
A2
3
READ
t DVKH
t KHKH
t CHQX1
t CHCQX
t KHIX
t
t KHK#H
t CHCQV
t CHQV
4 MEG x 8, 4 MEG x 9, 2 MEG x 18, 1 MEG x 36
D31
A3
4
WRITE
READ/WRITE Timing
t KHDX
t CHCQX
(Note 1)
t CHCQV
t CHQX
Q00
D50
A4
5
Figure 6
READ
t KHK#H
t KHKH
18
t CHQV
t CHQX
Q01
D51
A5
6
1.8V V
WRITE
t DVKH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
3
Q20
D60
t CQHQV
7
DD
NOP
, HSTL, QDRIIb2 SRAM
t KHDX
Q21
D61
A6
8
DON’T CARE
WRITE
(Note 2)
Q40
9
NOP
UNDEFINED
©2002, Micron Technology Inc.
ADVANCE
t CHQZ
Q41
10