HYS64V2100GCU-10 SIEMENS [Siemens Semiconductor Group], HYS64V2100GCU-10 Datasheet
HYS64V2100GCU-10
Related parts for HYS64V2100GCU-10
HYS64V2100GCU-10 Summary of contents
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... SDRAM Module 3. 72-Bit SDRAM Module 168 pin unbuffered DIMM Modules 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual-In-Line SDRAM Module • for PC main memory applications 1 bank organisation • Optimized for byte-write non-parity or ECC applications • ...
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... The HYS64(72)V21)00G(C)U-10 are industry standard 168-pin 8-byte Dual in-line Memory Modules (DIMMs) which are organised and high speed memory arrays designed with Synchronous DRAMs (SDRAMs) for non-parity and ECC applications. The DIMMs use eight SDRAMs for the organisation and an additional SDRAM for the organisation ...
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... A10 VCC 82 41 VCC 83 42 CLK0 84 Note : Pinnames in brackets are for the x72 ECC versions Semiconductor Group HYS64(72)V2100G(C)U- 64/72 SDRAM-Module Symbol PIN # Symbol VSS 85 VSS DU 86 DQ32 CS2 87 DQ33 DQMB2 88 DQ34 DQMB3 89 DQ35 DU 90 VCC VCC ...
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... DQM DQ0-DQ7 DQ16-DQ23 DQM DQMB3 DQ0-DQ7 DQ24-DQ31 A0-A10,BS VCC VSS RAS CAS CKE0 Note only used in the x72 ECC version Block Diagram for 2M x 64/72 SDRAM DIMM modules Semiconductor Group CS WE DQMB4 DQ32-DQ39 DQMB5 DQ40-DQ47 DQMB6 DQ48-DQ55 ...
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... DDQ Symbol I( MHz Symbol HYS64(72)V2100G(C)U- 64/72 SDRAM-Module Limit Values min. max. 2.0 Vcc+0.3 IH – 0.5 0.8 IL 2.4 – OH – 0.4 OL – – Limit Values Unit min. max. (x64) (x72 ...
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... Icc3NS Burst Operating Icc4 Current Auto (CBR) Refresh Icc5 Current Self Refresh Current Icc6 Semiconductor Group HYS64(72)V2100G(C)U- 64/72 SDRAM-Module VCC = 3.3V a Test Condition Burst length = 4, CL=3 trc>=trc(min.), tck>=tck(min.), Io bank interleave operation CKE<=VIL(max), tck>=tck(min.) CKE<=VIL(max), tck=infinite CKE> ...
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... CKS t CKH t CKSP t CKSR RCD RAS HYS64(72)V2100G(C)U- 64/72 SDRAM-Module Limit Values Unit Note -10 max – 100 MHz – 66 MHz – 33 MHz 5 – – – – ...
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... CAS Latency = 2 CAS Latency = 1 DQM Data Out Disable Latency Write Cycle Data In Setup Time Data In Hold Time Data input to Precharge Data In to Active/refresh DQM Write Mask Latency Semiconductor Group HYS64(72)V2100G(C)U- 64/72 SDRAM-Module Limit Values Symbol -10 min max t 20 – RRD t 1 – ...
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... V with the timing referenced to the 1.4 V crossover ih and tCH 2.4 V 0.4 V tCL t T 1.4V tAC tOH 1.4V tHZ /2 -0.5) ns has to be added to this parameter. T -1) ns has to be added to this parameter HYS64(72)V2100G(C)U- 64/72 SDRAM-Module . All AC measurements assume Ohm Z=50 Ohm I fig.1 =1ns T ...
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... A serial presence detect storage device - E about the module configuration, speed, etc. is written into the E production using a serial presence detect protocol ( I SPD-Table: Byte# 0 Number of SPD bytes 1 Total bytes in Serial PD 2 Memory Type 3 Number of Row Addresses (without BS bits) 4 Number of Column Addresses (for x 8 SDRAM) ...
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... SPD-Table (cont’ Byte# 28 Minimum Row Active to Row Active delay tRRD 29 Minimum RAS to CAS delay tRCD 30 Minimum RAS pulse width tRAS 31 Module Bank Density (per bank) 32-61 Superset information (may be used in future) 62 SPD Revision 63 Checksum for bytes 64- Manufactures’ s information (optional) 127 ...
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... L-DIM-168-C1 SDRAM DIMM COB-Module package 66, 6,35 2,0 Detail A Semiconductor Group 133,35 127, 42, 124 125 6,35 2,0 Detail B 12 HYS64(72)V2100G(C)U- 64/72 SDRAM-Module 84 168 1,27 1 0,2 0,15 Detail C DM168-C1.WMF 3,0 ...