HYS64V4200GU-10 SIEMENS [Siemens Semiconductor Group], HYS64V4200GU-10 Datasheet - Page 4

• Manufacturer Part Number: HYS64V4200GU-10
• Description: 3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Block Diagram for 4M x 64 and 4M x 72 1 bank SDRAM DIMM modules (HYS64V4200GU)
Semiconductor Group
notes: 1) all resistors are 10 Ohms
CKE0
CLK1,CLK3
RAS, CAS, WE
A0-A11, BA0, BA1
VCC
VSS
DQ(15:8)
CB(7:0)
CS0
DQMB0
DQ(7:0)
DQMB1
CS2
DQMB2
DQ(31:24)
DQ(23:16)
DQMB3
2) D4 is only used in the x72 ECC version
3) DIMM may combine bytes 0 with 4, 1 with 5, 2 with 6 and 3 with 7 to obtain most advantagous
board layout to obtain minimum DQ trance length
Vcc
C
D0 - D3, (D4)
10 pF
LDQM
DQ0-DQ7
DQ8-DQ15
LDQM
DQ0-DQ7
DQ8-DQ15
UDQM
UDQM
LDQM
DQ0-DQ7
DQ8-DQ15
UDQM
D0 - D3, (D4)
D0 - D3, (D4)
D0 - D3, (D4)
D0 - D3, (D4)
CS
CS
CS
D0
D4
D1
4
DQ40-DQ47
DQMB4
DQ32-DQ39
DQMB5
DQ(63:56)
DQMB6
DQ(55:48)
DQMB7
CLK0 2 SDRAM+15pF
CLK1
CLK2 2 SDRAM+15pF
CLK3
Termination
Termination
SA0
SA1
SA2
SCL
4M x 64
E
HYS64(72)V4200/8220GU
2
PROM (256wordx8bit)
Clock Wiring
SA0
SA1
SA2
SCL
LDQM
DQ0-DQ7
UDQM
DQ8-DQ15
SDRAM-Modules
LDQM
DQ0-DQ7
DQ8-DQ15
UDQM
Termination
Termination
3 SDRAM+10pF
2 SDRAM+15pF
SDA
WP
4M x 72
CS
CS
D2
D3
47k