PEEL18LV8ZP-25L ANACHIP [Anachip Corp], PEEL18LV8ZP-25L Datasheet - Page 6
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PEEL18LV8ZP-25L
Manufacturer Part Number
PEEL18LV8ZP-25L
Description
CMOS Programmable Electrically Erasable Logic Device
Manufacturer
ANACHIP [Anachip Corp]
Datasheet
1.PEEL18LV8ZP-25L.pdf
(10 pages)
Design Security
The PEEL18LV8Z provides a special EEPROM security bit
that prevents unauthorized reading or copying of designs
programmed into the device. The PLD programmer sets
the security bit, either at the conclusion of the programming
cycle or as a separate step, after the device has been
Anachip Corp.
www.anachip.com.tw
Figure 6 - Typical ICC vs. Input Clock Frequency for
ICC
in
mA
0.01
100
0.1
10
1
0.01
0.1
the 18LV8Z
Frequency in MHz
1
10
100
6/10
programmed. Once the security bit is set it is impossible to
verify (read) or program the PEEL until the entire device
has first been erased with the bulk-erase function.
Signature Word
The signature word feature allows a 64-bit code to be
programmed into the PEEL18LV8Z if the software option is
used. The code can be read back even after the security
bit has been set. The signature word can be used to
identify the pattern programmed into the device or to
record the design revision, etc.
Programming Support
Anachip's JEDEC file translator allows easy conversion of
existing 20 pin PLD designs to the PEEL18LV8Z, without
the need for redesign. Anachip also offers (for free) its
proprietary WinPLACE software, an easy-to-use entry level
PC-based software development system.
Programming support includes all the popular third party
programmers such as BP Microsystems, System General,
Logical
Devices,
and
numerous
Rev. 1.0 Dec 16, 2004
others.