RHF1201_11 STMICROELECTRONICS [STMicroelectronics], RHF1201_11 Datasheet
RHF1201_11
Related parts for RHF1201_11
RHF1201_11 Summary of contents
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Features ■ Qml-V qualified, smd 5962-05217 ■ Rad hard: 300 kRad(Si) TID ■ Failure immune (SEFI) and latchup immune 2 (SEL 120 MeV-cm /mg at 2.7 V and 125° C ■ Hermetic package ■ Wide sampling range ■ ...
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Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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RHF1201 1 Block diagram Figure 1. Block diagram +2.5 V VIN INCM VINB CLK +2.5 V/3.3 V stage stage stage stage Sequencer-phase shifting Timing Digital data correction GND Doc ID 12585 Rev 5 Block diagram VREFP ...
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Pin connections 2 Pin connections Figure 2. Pin connections (top view) 4/ GNDBI GNDBI GNDBI GNDBE GNDBE GNDBE VCCBE VCCBE VCCBE ...
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RHF1201 3 Pin descriptions Table 2. Pin descriptions Pin Name Description 1 GNDBI Digital buffer ground 2 GNDBE Digital buffer ground Digital buffer power 3 VCCBE supply Out-of-range output Most significant bit 7 D11(MSB) ...
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Equivalent circuits 4 Equivalent circuits Figure 3. Analog inputs AVCC VIN or VINB 7 pF (pad) AGND Figure 5. Clock input DVCC CLK 7 pF (pad) DGND Figure 7. Slew rate control input VCCBE SRC 7 pF (pad) GNDBE 6/34 ...
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RHF1201 Figure 9. VREFP and INCM input VREFP Input impedance = 39 Ω Figure 10. VREFM input AVCC Input impedance 7 pF (pad) AGND VREFM High input impedance 7 pF (pad) Doc ID 12585 Rev 5 Equivalent circuits AVCC INCM ...
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Timing characteristics 5 Timing characteristics Table 3. Timing table Symbol DC Clock duty cycle Data output delay T od (fall of clock to data valid) T Data pipeline delay pd Data ready rising edge delay T dr after data change ...
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RHF1201 6 Absolute maximum ratings and operating conditions Table 4. Absolute maximum ratings Symbol AV Analog supply voltage CC DV Digital supply voltage CC V Digital buffer supply voltage CCBI V Digital buffer supply voltage CCBE V Analog inputs: bottom ...
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Electrical characteristics (unchanged after 300 kRad) 7 Electrical characteristics (unchanged after 300 kRad) Unless otherwise specified, the test conditions in the following tables are MHz REFP Table 6. ...
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RHF1201 Table 9. Digital inputs and outputs Symbol Parameter Clock input CT Clock threshold Clock amplitude CA (DC component = 1.25 V) Digital inputs V Logic "0" voltage IL V Logic "1" voltage IH Digital outputs V Logic "0" voltage ...
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Electrical characteristics (unchanged after 300 kRad) Figure 12. Differential input configuration Differential input signal Figure 13. ENOB vs. diff. input, square clock 11 Ω Ω 10k 100k 1M Input Frequency (Hz) Figure 15. THD ...
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RHF1201 Figure 17. SFDR vs. diff. input, square clock -30 -40 -50 Ω -60 -70 -80 -90 1k 10k 100k 1M Input Frequency (Hz) Figure 19. SINAD vs. diff. input, sine clock 70 Ω Ω Ω 50 ...
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Electrical characteristics (unchanged after 300 kRad) Figure 23. ENOB vs. square clock, diff. input Clock Frequency (Msps) Figure 25. THD vs. square clock, diff. input ...
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RHF1201 Figure 29. SINAD vs. sine clock, diff. input Clock Frequency (Msps) Figure 31. SNR vs. sine clock, diff. input Clock Frequency ...
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Electrical characteristics (unchanged after 300 kRad) Figure 35. Output buffer fall time capa-load (pF) 16/34 Figure 36. Output buffer rise time ...
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RHF1201 Figure 37. Single-ended input configuration Single-ended input signal Figure 38. ENOB vs. Fin, single-ended 11 Ω Ω 10k 100k 1M Input Frequency (Hz) Figure 40. THD vs. Fin, single-ended ...
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Electrical characteristics (unchanged after 300 kRad) Figure 42. SFDR vs. Fin, single-ended Ω 10k 100k 1M Input Frequency (Hz) Figure 44. ENOB vs. INCM, single-ended ...
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RHF1201 7.1 RHF1201 operating modes Extra functionalities are provided to simplify the application board as much as possible. The operating modes offered by the RHF1201 are described in Table 11. RHF1201 operating modes Analog input differential amplitude ( ...
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Electrical characteristics (unchanged after 300 kRad) 7.1.2 Outputs Out-of-range (OR): this function is implemented at the output stage to automatically detect any digital data that is over the full-scale range. For data within the range, OR remains in a low-level ...
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RHF1201 7.2 Driving the analog input Figure 46. Equivalent VIN - VINB (differential input) FS (full-scale) = 2(VREFP - VREFM) Figure 47. Maximum input swing on each VIN or VINB input Figure 48. Optimized single-ended configuration at VREFP = 1 ...
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Electrical characteristics (unchanged after 300 kRad) The RHF1201 is designed for use in a differential input configuration. Nevertheless, it can achieve good performance in a single-ended input configuration. In single-ended, a good- quality conversion can be achieved by using an ...
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RHF1201 Figure 50. Differential implementation using a balun 50 Ω track Analog input signal (50 Ω output) Figure 51. Single-to-differential implementation with op-amps Vin - single Vinpp 0 V GND GND With (Vout-diff) = (2R2/R1) R1/(R1+R2) = R3/(R3+R4) and R4/(R6+R4) ...
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Electrical characteristics (unchanged after 300 kRad) Cin and R behave like a high-pass filter and are calculated to set the lowest possible cut-off frequency. An example of VINB decoupling to reduce noise is shown in Figure 52. AC-coupling single-ended input ...
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RHF1201 7.3 Reference connection 7.3.1 Internal reference In the standard configuration, the ADC is biased with the internal reference voltage. The V pin is connected to analog ground while V REFM 1 should be decoupled ...
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Electrical characteristics (unchanged after 300 kRad) 7.4 Clock input The quality of the converter very much depends on the accuracy of the clock input in terms of jitter. The use of a low jitter, crystal-controlled oscillator is recommended. The following ...
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RHF1201 7.5 Power consumption optimization The internal architecture of the RHF1201 makes it possible to optimize the power consumption according to the sampling frequency of the application. For this purpose, an external R resistor is placed between the IPOL pin ...
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Electrical characteristics (unchanged after 300 kRad) 7.6 Layout precautions ● Use of dedicated analog and digital ground planes on the PCB is recommended for high-speed circuit applications to provide low parasitic inductance and resistance. Ground planes under the digital pins ...
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RHF1201 8 Definitions of specified parameters 8.1 Static parameters Differential non-linearity (DNL) The average deviation of any output code width from the ideal code width of 1 LSB. Integral non-linearity (INL) An ideal converter exhibits a transfer function which is ...
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Definitions of specified parameters Pipeline delay Delay between the initial sample of the analog input and the availability of the corresponding digital data output on the output bus. Also called data latency expressed as a number of clock ...
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RHF1201 9 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ...
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Package information Table 12. Ceramic SO-48 package mechanical data Ref 32/34 Dimensions Millimeters Min. Typ. Max. 2.18 2.47 2.72 0.20 0.254 0.30 0.12 0.15 0.18 15.57 ...
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RHF1201 10 Revision history Table 13. Document revision history Date 01-Sep-2006 29-Jun-2007 10-Oct-2008 09-Apr-2010 29-Jul-2011 Revision 1 Initial release in new format. Updated failure immune and latchup immune value /mg. 2 Updated package mechanical data. Removed reference ...
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Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any ...