RHF1401_12 STMICROELECTRONICS [STMicroelectronics], RHF1401_12 Datasheet - Page 13
RHF1401_12
Manufacturer Part Number
RHF1401_12
Description
Rad-hard 14-bit 30 Msps A/D converter
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.RHF1401_12.pdf
(42 pages)
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RHF1401
2.2
Timing characteristics
Table 5.
1. As per
2. If the duty cycle does not equal 50%: T
Figure 11. Timing diagram
The input signal is sampled on the rising edge of the clock while the digital outputs are
synchronized on the falling edge of the clock. The duty cycles on DR and CLK are the same.
The rising and falling edges of the OR pin are synchronized with the falling edge of the DR
pin.
Symbol
DC
T
T
T
T
T
T
od
on
off
pd
rD
fD
Figure
Clock duty cycle
Data output delay (fall of
clock to data valid)
Data pipeline delay
Falling edge of OEB to
digital output valid data
Rising edge of OEB to
digital output tri-state
Data rising time
Data falling time
Timing characteristics
11.
Analog
input
CLK
OEB
Data
output
DR
OR
Parameter
N-2
N-1
(1)
(2)
Tod
Doc ID 13317 Rev 8
N -8
N
pd
N+1
N -7
Tod
= 7 cycles + CLK pulse width.
F
10 pF load capacitance
Duty cycle = 50%
10 pF load capacitance
10 pF load capacitance
N+2
s
N -6
= 20 Msps
Test conditions
N+3
Tpd + Tod
N-5
N+4
N -4
Toff
N+5
N -3
HZ state
N+6
N+7
Ton
N-1
Electrical characteristics
Min
N+8
7.5
45
N
5
N+1
Typ
7.5
7.5
50
1
1
6
3
Max
7.5
65
13
AM06120
cycles
Unit
13/42
ns
ns
ns
ns
ns
%
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