PDM41256LA10T ETC [List of Unclassifed Manufacturers], PDM41256LA10T Datasheet

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PDM41256LA10T

Manufacturer Part Number
PDM41256LA10T
Description
256K Static RAM 32K x 8-Bit
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet
Features
Functional Block Diagram
Rev. 2.0 - 7/17/96
High-speed access times
Com’l: 7, 8, 10, 12, and 15 ns
Ind’l: 8, 10, 12, and 15 ns
Low power operation (typical)
- PDM41256SA
- PDM41256LA
Single +5V (±10%) power supply
TTL-compatible inputs and outputs
Packages
Plastic SOJ (300 mil) - TSO
Plastic TSOP - T
Active: 400 mW
Standby: 150 mW
Active: 350 mW
Standby: 25 mW
Description
The PDM41256 is a high-performance CMOS static
RAM organized as 32,768 x 8 bits. This product is
produced
technology which offers the designer the highest
speed parts. Writing to this device is accomplished
when the write enable (WE) and the chip enable
(CE) inputs are both LOW. Reading is accomplished
when WE remains HIGH and CE and OE are both
LOW.
The PDM41256 operates from a single +5V power
supply and all the inputs and outputs are fully TTL-
compatible. The PDM41256 comes in two versions,
the standard power version PDM41256SA and a low
power version the PDM41256LA. The two versions
are functionally the same and only differ in their
power consumption.
The PDM41256 is available in a 28-pin plastic TSOP
and a 28-pin 300-mil plastic SOJ.
in
Paradigm’s
256K Static RAM
proprietary
PDM41256
32K x 8-Bit
CMOS
3-33
10
11
12
1
2
3
4
5
6
7
8
9

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PDM41256LA10T Summary of contents

Page 1

Features High-speed access times Com’ 10, 12, and 15 ns Ind’l: 8, 10, 12, and 15 ns Low power operation (typical) - PDM41256SA Active: 400 mW Standby: 150 mW - PDM41256LA Active: 350 mW Standby Single ...

Page 2

Pin Configurations TSOP Truth Table NOTE Absolute Maximum Ratings Symbol Rating V Terminal Voltage with Respect to Vss TERM T Temperature Under Bias BIAS T Storage Temperature STG P Power Dissipation Output Current ...

Page 3

DC Electrical Characteristics Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage OH NOTE (min) = ...

Page 4

AC Test Conditions Input pulse levels Input rise and fall times Input timing reference levels Output reference levels Output load Figure 1. Output Load Equivalent 3- 3. 1.5V 1.5V See Figures 1 and 2 Figure ...

Page 5

Read Cycle No. 1 (2) Read Cycle No Electrical Characteristics Description READ Cycle READ cycle time Address access time Chip enable access time Output hold from address change ( Chip enable to output in low ...

Page 6

Write Cycle No. 1 (Write Enable Controlled) Write Cycle No. 2 (Chip Enable Controlled) AC Electrical Characteristics Description WRITE Cycle WRITE cycle time Chip enable to end of write Address valid to end of write Address setup time Address hold ...

Page 7

Low V Data Retention Waveform CC Data Retention Electrical Characteristics (LA Version Only) Symbol Parameter V V for Retention Data Data Retention Current CCDR t Chip Deselect to Data Retention Time CDR (4) t Operation Recovery Time ...

Page 8

Ordering Information 3-40 PDM41256 Rev. 2.0 - 7/17/96 ...

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