HYB514175BJ-50- SIEMENS [Siemens Semiconductor Group], HYB514175BJ-50- Datasheet - Page 9

• Manufacturer Part Number: HYB514175BJ-50-
• Description: 256k x 16-Bit EDO-DRAM
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Notes
1. All voltages are referenced to
2.
3.
4. Address can be changed once or less while RAS =
5. An initial pause of 200 s is required after power-up followed by 8 RAS cycles of which at least
6. AC measurements assume
7.
8. Measured with the specified current load and 100 pF at
9. Operation within the
10.Operation within the
11.Either
12.
13.Either
14.Either
15.
16.These parameters are referenced to the CAS leading edge in early write cycles and to the WE
Semiconductor Group
I
I
or less during a hyper page mode (EDO) cycle
one cycle has to be a refresh cycle, before proper device operation is achieved. In case of using
the internal refresh counter, a minimum of 8 CAS-before-RAS initialization cycles instead of
8 RAS cycles are required.
V
are also measured between
time is determined by the latter of
a reference point only. If
controlled by
a reference point only. If
controlled by
are not referenced to output voltage levels.
CAS, whichever occurs last.
sheet as electrical characteristics only. If
data out pin will remain open-circuit (high impedance) through the entire cycle; if
t
contain data read from the selected cells. If neither of the above sets of conditions is satisfied, the
condition of I/O (at access time) is indeterminated.
leading edge in read-write cycles.
t
t
RWD
CC1
CC1
OFF (MAX.)
WCS
IH (MIN.)
,
and
,
>
I
t
CC3
RWD
t
t
t
t
RCH
DZC
CDD
RWD (MIN.)
and
I
,
,
CC4
,
I
t
CC4
OEZ (MAX.)
or
t
or
or
CWD
V
depend on output loading. Specified values are obtained with the output open.
t
t
t
CAC
AA
t
t
IL (MAX.)
DZO
and
RRH
ODD
,
.
and
t
.
CWD
must be satisfied.
must be satisfied for a read cycle.
must be satisfied.
I
CC6
define the time at which the output achieves the open-circuit conditions and
t
t
t
are reference levels for measuring timing of input signals. Transition times
AWD
RCD (MAX.)
RAD (MAX.)
>
depend on cycle rate.
t
CWD (MIN.)
are not restrictive operating parameters. They are included in the data
t
t
RCD
RAD
t
V
T
V
IH
= 2 ns.
is greater than the specified
is greater than the specified
limit ensures that
limit ensures that
SS
and
and
.
t
RAC
V
t
,
IL
AWD
t
.
CAC
t
WCS
>
,
t
t
t
AA
AWD (MIN.)
OFF
9
>
,
t
t
t
t
RAC (MAX.)
RAC (MAX.)
WCS (MIN.)
is referenced from the rising edge of RAS or
CPA
V
,
IL
, the cycle is a read-write cycle and I/O will
t
. In case of
OEA
V
, the cycle is an early write cycle and
can be met.
.
can be met.
OL
t
t
t
CAC
RCD (MAX.)
RAD (MAX.)
HYB 514175BJ-50/-55/-60
= 0.8 V and
is measured from tristate.
256k
I
CC4
limit, then access time is
limit, then access time is
t
t
it can be changed once
RCD (MAX.)
RAD (MAX.)
V
16 EDO-DRAM
OH
= 2.0 V. Access
is specified as
is specified as
1998-10-01