EDD1232AABH ELPIDA [Elpida Memory], EDD1232AABH Datasheet - Page 16

• Manufacturer Part Number: EDD1232AABH
• Description: 128M bits DDR SDRAM (4M words x 32 bits)
• Manufacturer: ELPIDA [Elpida Memory]

Function Truth Table
The following tables show the operations that are performed when each command is issued in each state of the
DDR SDRAM.
Current state
Precharging*
Idle*
Refresh
(auto-refresh)*
Activating*
Active*
Data Sheet E0533E50 (Ver. 5.0)
2
5
4
1
3
/CS
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
/RAS /CAS /WE
H
H
H
H
L
L
L
H
H
H
H
L
L
L
L
H
H
H
L
H
H
H
H
L
L
L
H
H
H
H
L
L
L
H
H
L
L
H
H
L
H
H
L
L
H
H
L
L
H
H
L
H
H
L
L
H
H
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
Address
BA, CA, A8
BA, CA, A8
BA, RA
BA, A8
BA, CA, A8
BA, CA, A8
BA, RA
BA, A8
MODE
BA, CA, A8
BA, CA, A8
BA, RA
BA, A8
BA, CA, A8
BA, CA, A8
BA, RA
BA, A8
16
Command
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE, PALL
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE, PALL
REF, SELF
MRS
DESL
NOP
BST
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE, PALL
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE, PALL
Operation
NOP
NOP
ILLEGAL*
ILLEGAL*
ILLEGAL*
ILLEGAL*
NOP
ILLEGAL
NOP
NOP
ILLEGAL*
ILLEGAL*
ILLEGAL*
Activating
NOP
Refresh/
Self refresh*
Mode register set*
NOP
NOP
ILLEGAL
ILLEGAL
ILLEGAL
NOP
NOP
ILLEGAL*
ILLEGAL*
ILLEGAL*
ILLEGAL*
ILLEGAL*
ILLEGAL
NOP
NOP
ILLEGAL
Starting read operation Read/READA
Starting write operation
ILLEGAL*
Pre-charge
ILLEGAL
11
11
11
11
11
11
11
11
11
11
11
11
11
12
EDD1232AABH
12
Next state
ldle
ldle
—
—
—
—
ldle
—
ldle
ldle
—
—
—
Active
ldle
ldle/
Self refresh
ldle
ldle
ldle
—
—
—
Active
Active
—
—
—
—
—
—
Active
Active
Active
Write
recovering/
precharging
—
Idle
—