SRI4K-SBN181GE STMICROELECTRONICS [STMicroelectronics], SRI4K-SBN181GE Datasheet - Page 17
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SRI4K-SBN181GE
Manufacturer Part Number
SRI4K-SBN181GE
Description
13.56 MHz short-range contactless memory chip with 4096-bit EEPROM and anticollision functions
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.SRI4K-SBN181GE.pdf
(45 pages)
- Current page: 17 of 45
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SRI4K
4.3
4.4
EEPROM area
The 121 blocks between addresses 7 and 127 are EEPROM blocks of 32 bits each (484
bytes in total). (See
the Read_block and Write_block commands. The Write_block command for the EEPROM
area always includes an auto-erase cycle prior to the write cycle.
Blocks 7 to 15 can be write-protected. Write access is controlled by the 8 bits of the
OTP_Lock_Reg located at block address 255 (see “OTP_Lock_Reg” for details). Once
protected, these blocks (7 to 15) cannot be unprotected.
Figure 17. EEPROM (addresses 7 to 127)
System area
This area is used to modify the settings of the SRI4K. It contains 3 registers:
OTP_Lock_Reg, Fixed Chip_ID and ST Reserved. See
A Write_block command in this area will not erase the previous contents. Selected bits can
thus be set from 1 to 0. All bits previously at 0 remain unchanged. Once all the 32 bits of a
block are at 0, the block is empty and cannot be updated any more.
Block
address
127
10
11
12
13
14
15
16
7
8
9
...
MSb
b31
Figure 17
b24 b23
for a map of the area.) These blocks can be accessed using
User area
User area
User area
User area
User area
User area
User area
User area
User area
User area
User area
User area
32-bit block
b16 b15
Figure 18
b8 b7
for a map of this area.
LSb
b0
Memory mapping
Description
Lockable
EEPROM
EEPROM
Ai07662c
17/45
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