HCTS132DMSR INTERSIL [Intersil Corporation], HCTS132DMSR Datasheet

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HCTS132DMSR

Manufacturer Part Number
HCTS132DMSR
Description
Radiation Hardened Quad 2-Input NAND Schmitt Trigger
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
August 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
• Input Current Levels Ii
Description
The Intersil HCTS132MS is a Radiation Hardened Quad 2-Input
NAND Schmitt Trigger inputs. A high on both inputs forces the
output to a Low state.
The HCTS132MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS132MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
HCTS132DMSR
HCTS132KMSR
HCTS132D/
Sample
HCTS132K/
Sample
HCTS132HMSR
(Typ)
- VIL = 0.8V Max
- VIH = VCC/2 Min
NUMBER
PART
TEMPERATURE
-55
-55
o
o
RANGE
C to +125
C to +125
+25
+25
+25
10
o
o
o
RAD (Si)/s 20ns Pulse
C
C
C
5 A at VOL, VOH
|
Copyright
o
o
C
C
12
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
Sample
Die
o
SCREENING
C to +125
©
RAD (Si)/s
LEVEL
Intersil Corporation 1999
o
-9
C
2
/mg
Errors/Bit-Day
14 Lead SBDIP
14 Lead
Ceramic
Flatpack
14 Lead SBDIP
14 Lead
Ceramic
Flatpack
Die
PACKAGE
500
HCTS132MS
Quad 2-Input NAND Schmitt Trigger
Pinouts
NOTE: L = Logic Level Low, H = Logic level High
Functional Diagram
(2, 5, 10, 13)
(1, 4, 9, 12)
GND
nO
nA
A1
B1
A2
B2
Y1
Y2
An
H
H
L
L
FLATPACK PACKAGE (FLATPACK)
14 LEAD CERAMIC DUAL-IN-LINE
14 LEAD CERAMIC METAL SEAL
METAL SEAL PACKAGE (SBDIP)
GND
INPUTS
MIL-STD-1835 CDFP3-F14
A1
B1
Y1
A2
B2
Y2
MIL-STD-1835 CDIP2-T14
1
2
3
4
5
6
7
TRUTH TABLE
1
2
3
4
5
6
7
TOP VIEW
TOP VIEW
Radiation Hardened
Bn
H
H
L
L
Spec Number
14
13
12
11
10
9
8
File Number
14
13
12
11
10
9
8
VCC
B4
A4
Y4
B3
A3
Y3
OUTPUTS
Yn
(3, 6, 8, 11)
H
H
H
L
nY
518604
3062.1
VCC
B4
A4
Y4
B3
A3
Y3

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HCTS132DMSR Summary of contents

Page 1

... This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS132MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART TEMPERATURE NUMBER RANGE o o HCTS132DMSR - +125 HCTS132KMSR - +125 C o ...

Page 2

Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage ...

Page 3

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Input to Output TPLH VCC = 4.5V TPHL VCC = 4.5V Input Switch Points Vt+ VCC = 4.5V Vt- VCC = 4.5V VH VCC = 4.5V NOTES: 1. All voltages referenced to ...

Page 4

TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL Output Voltage Low VOL VCC = 4.5V and 5.5V, VIH = VCC/2, VIL = 0.4V, IOL = 50 A Output Voltage High VOH VCC = 4.5V and 5.5V, VIH ...

Page 5

CONFORMANCE GROUPS METHOD Group E Subgroup 2 5005 NOTE: Except FN test which will be performed 100% Go/No-Go. TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OPEN GROUND STATIC BURN-IN I TEST CONDITIONS (Note ...

Page 6

Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method ...

Page 7

AC Timing Diagrams VIH INPUT VS VIL TPLH VOH VS OUTPUT VOL TTLH VOH 80% 20% OUTPUT VOL AC VOLTAGE LEVELS PARAMETER HCTS VCC 4.50 VIH 3.00 VS 1.30 VIL 0 GND 0 HCTS132MS AC Load Circuit DUT TPHL CL ...

Page 8

Die Characteristics DIE DIMENSIONS mils 2.29 x 2.29mm METALLIZATION: Type: AlSi Å Å Metal Thickness: 11k 1k GLASSIVATION: Type: SiO 2 Å Å Thickness: 13k 2.6k WORST CASE CURRENT DENSITY <2 A/cm BOND ...

Page 9

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, ...

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