QL6500-4PS484C QuickLogic Corp, QL6500-4PS484C Datasheet

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QL6500-4PS484C

Manufacturer Part Number
QL6500-4PS484C
Description
Manufacturer
QuickLogic Corp
Datasheets

Specifications of QL6500-4PS484C

Package
BGA
Date_code
09+
• • • • • •
Device Highlights
Flexible Programmable Logic
• 0.25 µ, 5 layer metal CMOS process
• 2.5 V Vcc, 2.5/3.3 V dive capable I/O
• Up to 4032 logic cells
• Up to 583,000 max system gates
• Up to 347 I/O
Embedded Dual Port SRAM
• Up to thirty-six 2,304-bit dual port SRAM blocks
• Up to 82,900 RAM bits
• RAM/ROM/FIFO Wizard for automatic
• Configurable and cascadable
Applications
• Signal processing operators
• Signal processing functions
• Networking/communications for VoIP
• Speech/voice processing
• Channel coding
© 2007 QuickLogic Corporation
configuration
Eclipse Family Data Sheet
Combining Performance, Density, and Embedded RAM
Programmable I/O
• High performance: <3.2 ns Tco
• Programmable slew rate control
• Programmable I/O standards:
Advanced Clock Network
• Nine global clock networks
• Sixteen I/O (high-drive) networks
• Twenty quad-net networks: five per quadrant
PLL
PLL
LVTTL, LVCMOS, PCI, GTL+, SSTL2,
and SSTL3
Eight independent I/O banks
Three register configurations: input, output and
output enable
One dedicated
Eight programmable
Figure 1: Eclipse Block Diagram
Embedded RAM Blocks
Embedded RAM Blocks
Fabric
www.quicklogic.com
PLL
PLL
1

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