ASC7512 ETC2 [List of Unclassifed Manufacturers], ASC7512 Datasheet - Page 23

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ASC7512

Manufacturer Part Number
ASC7512
Description
DIGITAL TEMPERATURE SENSOR WITH INTEGRATED FAN CONTROL
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
The Current PWM Duty registers store the current duty cycle at each PWM output. At initial power-on, the PWM duty cycle
is 100% and thus, when read, this register will return FFh. After the Ready/Lock/Start/Override register Start bit is set, this
register and the PWM signals will be updated based on the algorithm described in the Auto Fan Control Operating Mode
section.
When read, the Current PWM Duty registers return the current PWM duty cycle. These registers are read-only unless the
fan is in manual (test) mode, in which case a write to these registers will directly control the PWM duty cycle for each fan.
The PWM duty cycle is represented as shown in Table 12.
If a 3-wire fan is being used and the option to enable 3-wire tach measurement is selected, the effective PWM duty cycle will
be impacted by this feature. The 3-wire Enable setting will hold the PWM signal high for the period taken to make a
tachometer reading. This period depends on the RPM and various tachometer measurement parameters. Overall impact is
that lower PWM commands will be effectively increased and there may be acoustic effects.
Register 4E-51h: Thermal Zone Temperature Limit Registers
If an external temperature input or the internal temperature sensor either exceeds the value set in the corresponding high
limit register or falls below the value set in the corresponding low limit register, the corresponding bit will be set automatically
by the aSC7512 in the Interrupt Status Register 1 (41h). For example, if the temperature read from the Remote - and
Remote + inputs exceeds the Zone 1 High Temp register limit setting, Interrupt Status Register 1 ZN1 bit will be set. The
temperature limits in these registers are represented as 8 bit 2’s complement, signed numbers in Celsius, as shown below in
Table 13. Setting the Ready/Lock/Start/Override register Lock bit has no effect on these registers.
© Andigilog, Inc. 2006
Register
Address
4Eh
4Fh
50h
51h
Table 13 Zone Temperature High- and Low-Limit Registers - 8-Bit Two’s Complement
Read/
Write
R/W
R/W
R/W
R/W
Zone 1 Low Temp
Zone 1 High Temp
Zone 2 Low Temp
Zone 2 High Temp
Register Name
Table 12 Current PWM Duty Cycle Setting
+127°C (Default High)
-127°C (Default Low)
Current PWM %
~50% (Default)
Temperature
(MSB)
>127°C
+125°C
Bit 7
+90°C
+50°C
+25°C
-50°C
~25%
~75%
100%
7
7
7
7
0°C
0%
www.andigilog.com
Bit 6
6
6
6
6
- 23 -
0000
0100
1000
1100
1111
Bit 5
5
5
5
5
Register Value
Binary
Temperature Limit
(2’s Complement)
0111
0111
0111
0101
0011
0001
0000
1100
1000
0000
0000
0000
0000
1111
Bit 4
4
4
4
4
Hex
C0
FF
00
40
80
1111
1111
1101
1010
0010
1001
0000
1110
0001
Bit 3
3
3
3
3
Bit 2
2
2
2
2
Bit 1
August 2006 - 70A05003
1
1
1
1
aSC7512
(LSB)
Bit 0
0
0
0
0
Default
Value
81
7F
81
7F

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