K7I161882B-FC16 SAMSUNG [Samsung semiconductor], K7I161882B-FC16 Datasheet - Page 2

• Manufacturer Part Number: K7I161882B-FC16
• Description: 512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM
• Manufacturer: SAMSUNG [Samsung semiconductor]

FUNCTIONAL BLOCK DIAGRAM
FEATURES
K7I163682B
K7I161882B
ADDRESS
LD
R/W
BW
K
K
C
C
512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM
• 1.8V+0.1V/-0.1V Power Supply.
• DLL circuitry for wide output data valid window and future
• I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O,
• Pipelined, double-data rate operation.
• Common data input/output bus .
• HSTL I/O
• Full data coherency, providing most current data.
• Synchronous pipeline read with self timed late write.
• Registered address, control and data input/output.
• DDR(Double Data Rate) Interface on read and write ports.
• Fixed 2-bit burst for both read and write operation.
• Clock-stop supports to reduce current.
• Two input clocks(K and K) for accurate DDR timing at clock
• Two input clocks for output data(C and C) to minimize
• Two echo clocks (CQ and CQ) to enhance output data
• Single address bus.
• Byte write (x18, x36) function.
• Simple depth expansion with no data contention.
• Programmable output impedance.
• JTAG 1149.1 compatible test access port.
• 165FBGA(11x15 ball array FBGA) with body size of 13x15mm
Notes: 1. Numbers in ( ) are for x18 device.
1.8V+0.1V/-0.1V for 1.8V I/O.
A0
freguency scaling.
rising edges only.
clock-skew and flight-time mismatches.
traceability.
DDRII SRAM and Double Data Rate comprise a new family of products developed by Cypress, Renesas, IDT, NEC and Samsung technology.
X
18 (or 19)
4(or 2)
ADD REG
LOGIC
BURST
LOGIC
DATA
CTRL
REG
GEN
CLK
&
(or 19)
18
SELECT OUTPUT CONTROL
WRITE DRIVER
36 (or 18)
36 (or 18)
MEMORY
512Kx36
(1Mx18)
ARRAY
512Kx36 & 1Mx18 DDRII CIO b2 SRAM
- 2 -
Organization
X36
X18
(or 18)
36
K7I163682B-FC30
K7I163682B-FC25
K7I163682B-FC20
K7I163682B-FC16
K7I161882B-FC30
K7I161882B-FC25
K7I161882B-FC20
K7I161882B-FC16
Number
Part
(or 36)
72
Cycle
Time
3.3
4.0
5.0
6.0
3.3
4.0
5.0
6.0
(Echo Clock out)
Access
Time
0.45
0.45
0.45
0.50
0.45
0.45
0.45
0.50
36 (or 18)
CQ, CQ
July. 2004
DQ
Rev 3.1
Unit
ns
ns
ns
ns
ns
ns
ns
ns