X24641S8-1.8 XICOR [Xicor Inc.], X24641S8-1.8 Datasheet - Page 5

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X24641S8-1.8

Manufacturer Part Number
X24641S8-1.8
Description
400 KHz 2-Wire Serial E 2 PROM
Manufacturer
XICOR [Xicor Inc.]
Datasheet
X24641
Figure 4. Device Addressing
DEVICE ADDRESSING
Following a start condition, the master must output the
address of the slave it is accessing. The first four bits
of the Slave Address Byte are the device type identifier
bits. These must equal “1010”. The next 3 bits are the
device select bits S
devices to share a single bus. These bits are
compared to the S
pins. The last bit of the Slave Address Byte defines the
operation to be performed. When the R/W bit is a one,
then a Read Operation is selected. When it is zero
then a Write Operation is selected. Refer to figure 4.
After loading the Slave Address Byte from the SDA
bus, the device compares the device type bits with the
value “1010” and the device select bits with the status
A7
D7
0
1
DEVICE TYPE
IDENTIFIER
A6
D6
0
0
LOW ORDER ADDRESS
SLAVE ADDRESS BYTE
D5
A5
1
0
ADDRESS BYTE 0
ADDRESS BYTE 1
0
0
, S
, S
DA TA BYTE
A12
A4
D4
0
HIGH ORDER ADDRESS
1
1
, and S
, and S
S 2
A11
A3
D3
SELECT
DEVICE
A10
2
S 1
2
A2
D2
. This allows up to 8
device select input
S 0
A9
A1
D1
7026 FM 06
R/ W
A8
A0
D0
5
of the device select input pins. If the compare is not
successful, no acknowledge is output during the ninth
clock cycle and the device returns to the standby mode.
The byte address is either supplied by the master or
obtained from an internal counter, depending on the
operation. When required, the master must supply the
two Address Bytes as shown in figure 4.
The internal organization of the E
pages by 32 bytes per page. The page address is
partially contained in the Address Byte 1 and partially in
bits 7 through 5 of the Address Byte 0. The specific byte
address is contained in bits 4 through 0 of the Address
Byte 0. Refer to figure 4.
2
PROM array is 256

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