K9K1G08U0A Samsung semiconductor, K9K1G08U0A Datasheet - Page 20

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K9K1G08U0A

Manufacturer Part Number
K9K1G08U0A
Description
128M x 8 Bit / 64M x 16 Bit NAND Flash Memory
Manufacturer
Samsung semiconductor
Datasheet

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Figure 8. Read Operation with CE don’ t-care.
System Interface Using CE don’ t-care.
For an easier system interface, CE may be inactive during the data-loading or sequential data-reading as shown below. The internal
528byte(x8 device), 264word(x16 device) page registers are utilized as separate buffers for this operation and the system design gets
more flexible. In addition, for voice or audio applications which use slow cycle time on the order of u-seconds, de-activating CE during
the data-loading and reading would provide significant savings in power consumption.
Figure 7. Program Operation with CE don’ t-care.
K9K1G08Q0A
K9K1G08U0A
CLE
CE
WE
ALE
I/O
CE
WE
CLE
ALE
R/B
I/O
CE
WE
RE
X
X
t
CS
00h
80h
K9K1G16Q0A
K9K1G16U0A
Start Add.(4Cycle)
Start Add.(4Cycle)
t
WP
On K9K1G08U0A_Y,P or K9K1G08U0A_V,F
CE must be held
low during tR
t
CH
t
R
Data Input
20
I/O
CE
RE
X
CE don’ t-care
t
CE don’ t-care
Data Output(sequential)
CEA
t
REA
FLASH MEMORY
Data Input
out
Preliminary
10h

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