PLS159 PHILIPS [NXP Semiconductors], PLS159 Datasheet

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PLS159

Manufacturer Part Number
PLS159
Description
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Philips Semiconductors Programmable Logic Devices
DESCRIPTION
The PLS159A is a 3-State output, registered
logic element combining AND/OR gate arrays
with clocked J-K flip-flops. These J-K
flip-flops are dynamically convertible to
D-type via a “fold-back” inverting buffer and
control gate F
outputs (F) in conjunction with 4 bidirectional
I/O lines (B). These yield variable I/O gate
and register configurations via control gates
(D, L) ranging from 16 inputs to 12 outputs.
The AND/OR arrays consist of 32 logic AND
gates, 13 control AND gates, and 21 OR
gates with fusible link connections for
programming I/O polarity and direction. All
AND gates are linked to 4 inputs (I),
bidirectional I/O lines (B), internal flip-flop
outputs (Q), and Complement Array output
(C). The Complement Array consists of a
NOR gate optionally linked to all AND gates
for generating and propagating
complementary AND terms.
On-chip T/C buffers couple either True (I, B,
Q) or Complement (I, B, Q, C) input polarities
to all AND gates, whose outputs can be
optionally linked to all OR gates. Any of the
32 AND gates can drive bidirectional I/O lines
(B), whose output polarity is individually
programmable through a set of Ex-OR gates
for implementing AND-OR or AND-NOR logic
functions. Similarly, any of the 32 AND gates
can drive the J-K inputs of all flip-flops. There
are 4 AND gates for the Asynchronous
Preset/Reset functions.
All flip-flops are positive edge-triggered and
can be used as input, output or I/O (for
interfacing with a bidirectional data bus) in
conjunction with load control gates (L),
steering inputs (I), (B), (Q) and
programmable output select lines (E).
The PLS159A is field-programmable,
enabling the user to quickly generate custom
patterns using standard programming
equipment.
ORDERING INFORMATION
October 22, 1993
Programmable logic sequencer
(16
20-Pin Plastic Dual In-Line Package (300mil-wide)
20-Pin Plastic Leaded Chip Carrier
45
C
. It features 8 registered I/O
12)
DESCRIPTION
FEATURES
APPLICATIONS
High-speed version of PLS159
f
– 25MHz clock rate
Field-Programmable (Ni-Cr link)
4 dedicated inputs
13 control gates
32 AND gates
21 OR gates
45 product terms:
– 32 logic terms
– 13 control terms
4 bidirectional I/O lines
8 bidirectional registers
J-K, T, or D-type flip-flops
Power-on reset feature on all flip-flops
(F
Asynchronous Preset/Reset
Complement Array
Active-High or -Low outputs
Programmable OE control
Positive edge-triggered clock
Input loading: –100 A (max.)
Power dissipation: 750mW (typ.)
TTL compatible
3-State outputs
Random sequential logic
Synchronous up/down counters
Shift registers
Bidirectional data buffers
Timing function generators
System controllers/synchronizers
Priority encoder/registers
MAX
n
= 1)
= 18MHz
25
ORDER CODE
PLS159AN
PLS159AA
PIN CONFIGURATIONS
N = Plastic Dual In-Line Package (300mil-wide)
A = Plastic Leaded Chip Carrier
B0
B1
B2
I2
I3
GND
CLK
B0
B1
B2
B3
I0
I1
I2
I3
4
5
6
7
8
10
B3 GND
1
2
3
4
5
6
7
8
9
I1
DRAWING NUMBER
3
9
N Package
A Package
10
I0
2
CLK
OE
11
0408D
1
0400E
Product specification
V
F0 F1
20
12 13
PLS159A
CC
853–1159 11164
F7
19
20
19
18
17
16
15
14
13
12
11
18
17
16
15
14
V
F7
F6
F5
F4
F3
F2
F1
F0
OE
CC
F6
F5
F4
F3
F2

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PLS159 Summary of contents

Page 1

... Philips Semiconductors Programmable Logic Devices Programmable logic sequencer (16 45 12) DESCRIPTION The PLS159A is a 3-State output, registered logic element combining AND/OR gate arrays with clocked J-K flip-flops. These J-K flip-flops are dynamically convertible to D-type via a “fold-back” inverting buffer and control gate features 8 registered I/O ...

Page 2

... M5 CK’ CK’ CK’ CK’ CK’ CK’ Product specification PLS159A CLK CK ...

Page 3

... +10V Product specification PLS159A CLK NOTES: 1. Positive Logic ...

Page 4

... October 22, 1993 CAUTION: PLS159A PROGRAMMING ALGORITHM The programming voltage required to program the PLS159A is higher (17.5V) than that required to program the PLS159 (14.5V). Consequently, the PLS159 programming algorithm will not program the PLS159A. Please exercise caution when accessing programmer device codes to insure that the correct algorithm is used ...

Page 5

... MAX 5. 0.45V MAX 5.5V CC OUT V = 0.45V OUT –15 OUT V = MAX 5.0V 2. 2.0V OUT 29 Product specification PLS159A LIMITS 1 TYP MAX UNIT V 0.8 V –0.8 –1 0.35 0 < –10 –100 –1 –140 A mA –70 150 190 mA 8 ...

Page 6

... 5pF. High-to-High impedance tests are made to an output L TEST LOAD CIRCUIT INPUTS NOTE: C and C are to bypass V to GND Product specification PLS159A LIMITS 1 MIN TYP MAX UNIT ...

Page 7

... IH1 IS1 +3V 1.5V 1. CKH CKL t CKP 31 Product specification PLS159A TIMING DEFINITIONS SYMBOL PARAMETER t Width of input clock pulse. CKH t Interval between clock pulses. CKL t Clock period. CKP t Width of preset input pulse. PRH Required delay between t beginning of valid input and IS1 positive transition of clock ...

Page 8

... IS1 CKO +3V 1.5V 0V PRH (PRESET) (RESET (RESET) 1.5V 1.5V (PRESET IS1 +3V 1.5V 0V +3V 1. OE1 + 1.5V (FORCED IS2 IH2 + CKH t IH1 ( Product specification PLS159A ...

Page 9

... ENABLED K CODE T STATUS n 1 ACTIVE (Set) CAUTION: THE PLS159A Programming Algorithm is different from the PLS159. 33 Product specification PLS159A COMPLEMENT, INACTIVE, PRESET, etc., are defined below. PROGRAMMING AND SOFTWARE SUPPORT Refer to Section 9 (Development Software) and Section 10 (Third-party Programmer/ Software Support) of this data handbook for additional information ...

Page 10

... S, B CODE STATUS POLARITY 1 LOW CODE ACTION ACTION 4 A ENABLE n outputs to be unconditionally enabled. n due to their lack of “OR” array links Product specification PLS159A DISABLED K K CODE CODE ACTION L HOLD – CODE CODE POLARITY L HIGH ...

Page 11

... Product specification PLS159A NOTES 1. The device is shipped with all links intact. Thus a back- ground of entries corresponding to states of virgin links exists in the table, shown BLANK for clarity. 2. Program unused and Q bits in the AND array as (–). ...

Page 12

... October 22, 1993 (CONTROL TERMS DIN159 NIN159 CAND EXOR159 JKFF159 ( ( LNIN159 LDIN159 36 Product specification PLS159A OEA159 OEB159 TNOUT159 F CK CLK CK159 ...

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