MN6761 PANASONIC [Panasonic Semiconductor], MN6761 Datasheet - Page 6

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MN6761

Manufacturer Part Number
MN6761
Description
External Synchronization Control LSI for Color Video Cameras
Manufacturer
PANASONIC [Panasonic Semiconductor]
Datasheet

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MN6761S
3. Subcarrier synchronization block
4. Oscillator blocks
5. Automatic internal/external switching block
HBLK and BGP plus generator
There is an HBLK pulse for each H.
BGP pulses are generated for only 10 H to 256 H (NTSC) or 304 H (PAL) after the VR pulse.
This block converts the SC1 output from the synchronizing signal generator into four signals with the same
frequency as the burst subcarrier, but different phases. In this phase-locked loop circuit, the phase of GLBSC
is compared with the phase selected by 2 bits (SCPSW1 and SCPSW2).
During PAL operation, if the LSW polarity is wrong, this block sends an error detection pulse (LSWCONT)
to the synchronizing signal generator and reverses the LSW polarity. It also adjusts the relationship between
fields 1 through 4.
The Xf
capacitor creates voltage-controlled oscillators that generate the synchronization signal circuit clock (Xf
and subcarrier circuit clock (4f
If it detects a minimum of ten edges from the GLSYNC input, this block switches the chip to the external
synchronization mode and drives the EXT/INT pin at "H" level. If there are no edges in the GLSYNC input
for 10 H, this block switches the chip to the internal synchronization mode and drives this pin at "L" level.
GLSYNC
HBLK
BGP
H
and 4f
SC
oscillator blocks operate only during external synchronization mode. Connecting a variable
5.3µs ( NTSC )
5.6µs ( PAL )
SC
) for output to the synchronization signal generator.
HBLK and BGP pulse timing chart
8.9µs ( NTSC )
8.8µs ( PAL )
2.5µs ( NTSC )
2.3µs ( PAL )
For Video Equipment
H
)

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