PXA250 INTEL [Intel Corporation], PXA250 Datasheet
PXA250
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PXA250 Summary of contents
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... Intel® PXA250 and PXA210 Applications Processors Electrical, Mechanical, and Thermal Specification Product Features High Performance Processor — Intel® XScale™ Microarchitecture — Instruction Cache — Data Cache — “mini” Data Cache — Extensive Data Buffering Intel® ...
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... The Intel® PXA250 and PXA210 Applications Processors may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Contents 1.0 About this Document.............................................................................................7 2.0 Functional Overview .............................................................................................. 7 3.0 Package Information.............................................................................................. 8 3.1 Package Introduction..................................................................................... 8 3.1.1 3.2 Package Power Ratings ..............................................................................29 4.0 Electrical Specifications ......................................................................................29 4.1 Absolute Maximum Ratings.........................................................................29 4.2 Operating Conditions...................................................................................30 4.3 Targeted DC Specifications.........................................................................31 4.4 Targeted AC Specifications.........................................................................32 4.5 Oscillator Electrical Specifications...............................................................33 4.5.1 4.5.2 4.6 Reset and Power AC Timing Specifications ................................................35 4 ...
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... AC Test Load ...................................................................................................... 45 Tables 1 Related Documentation......................................................................................... 7 2 Pin and Signal Descriptions for the PXA250 Applications Processor ................... 9 PXA250 256-Lead 17x17mm mBGA Pinout — Ballpad Number Order.............. Pin and Signal Descriptions for the PXA210 Applications Processor ................. 19 PXA210 225-Lead 13x13mm TPBGA Pinout — Ballpad Number Order ............ 27 ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Revision History Date Revision 7/6/01 0.5 2/8/02 -001 Datasheet Description First Release First public release of the EMTS 5 ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification 6 Datasheet ...
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... A rich set of serial devices as well as general system resources provide enough compute and connectivity capability for many applications. For details on the programming model and theory of operation of each of these units, refer to the Intel® PXA250 and PXA210 Applications Processors Developer's Manual. For the applications processor’s block diagram refer to Figure 1, “ ...
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... Package Information 3.1 Package Introduction The applications processor is offered in two packages; • The PXA250 applications processor, 256-pin mBGA (refer to Figure 2, “PXA250 Applications Processor” on page 16) • The PXA210 applications processor, 225-pin TPBGA package (refer to Figure 3, “PXA210 Applications Processor” on page 26) 8 Color or ...
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... Descriptions for the PXA250 Applications Processor” on page 9. The physical characteristics of the PXA250 applications processor are shown in Figure 2, “PXA250 Applications Processor” on page 16. The pinout for the PXA250 applications processor is described in Table 3, “PXA250 256- Lead 17x17mm mBGA Pinout — Ballpad Number Order” on page 17. ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification Table 2. Pin and Signal Descriptions for the PXA250 Applications Processor (Sheet Name Type SDCLK[2:0] OCZ nCS[5]/ ICOCZ GPIO[33] nCS[4]/ ICOCZ GPIO[80] nCS[3]/ ICOCZ GPIO[79] nCS[2]/ ICOCZ GPIO[78] nCS[1]/ ICOCZ GPIO[15] nCS[0] ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Table 2. Pin and Signal Descriptions for the PXA250 Applications Processor (Sheet Name Type nIOIS16/ ICOCZ GPIO[57] nPWAIT/ ICOCZ GPIO[56] nPSKTSEL/ ICOCZ GPIO[54] nPREG/ ICOCZ GPIO[55] LCD Controller Pins L_DD(15:0)/ ICOCZ GPIO[73:58] ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification Table 2. Pin and Signal Descriptions for the PXA250 Applications Processor (Sheet Name Type Bluetooth UART Pins BTRXD/ ICOCZ GPIO[42] BTTXD/ ICOCZ GPIO[43] BTCTS/ ICOCZ GPIO[44] BTRTS/ ICOCZ GPIO[45] MMC Controller Pins ...
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... As an input, it expects standard CMOS levels. Pulse Width Modulation channels 0 and 1 (outputs) See Note [1] General Purpose I/O. These two pins are contained in both the PXA250 and PXA210 Applications Processors. They are preconfigured at a hard reset (nRESET) as wakeup sources for both rising and falling edge detects. ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification Table 2. Pin and Signal Descriptions for the PXA250 Applications Processor (Sheet Name Type Miscellaneous Pins BOOT_SEL IC [2:0] PWR_EN OCZ nBATT_FAUL T IC nVDD_FAULT IC nRESET IC nRESET_OUT OC JTAG Pins nTRST IC TDI IC TDO OCZ TMS IC TCK ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Table 2. Pin and Signal Descriptions for the PXA250 Applications Processor (Sheet Name Type TESTCLK IC Power and Ground Pins VCC SUP VSS SUP PLL_VCC SUP PLL_VSS SUP VCCQ SUP VSSQ SUP VCCN ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification Figure 2. PXA250 Applications Processor 16 Datasheet ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 PXA250 256-Lead 17x17mm mBGA Pinout — Ballpad Number Order (Sheet Table 3. Ball # Signal A1 VCCN A2 L_DD[13]/GPIO[71] A3 L_DD[12]/GPIO[70] A4 L_DD[11]/GPIO[69] A5 L_DD[9]/GPIO[67] A6 L_DD[7]/GPIO[65] A7 GPIO[11] A8 L_BIAS/GPIO[77] A9 SSPRXD/GPIO[26] A10 SDATA_OUT/GPIO[30] A11 SDA ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification PXA250 256-Lead 17x17mm mBGA Pinout — Ballpad Number Order (Sheet Table 3. Ball # Signal C6 VCCQ C7 L_DD[2]/GPIO[60] C8 VSSQ C9 BITCLK/GPIO[28] H12 TCK H13 TMS H14 GPIO[6] H15 TDI H16 TDO J1 MA[7] J2 VSSN J3 MA[6] J4 ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 PXA250 256-Lead 17x17mm mBGA Pinout — Ballpad Number Order (Sheet Table 3. Ball # Signal K14 GPIO[3] K15 PXTAL K16 PEXTAL L1 MA[12] L2 VSSN L3 MA[13] L4 MD[20] L5 MD[2] L6 VCC L7 DQM[3] L8 MD[28] 3.1.1.2 PXA210 Signal Pin Descriptions Signal definitions for the PXA210 applications processor are described in Table 4. The physical characteristics of the PXA210 applications processor are shown in Figure 3, “ ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification Table 4. Pin and Signal Descriptions for the PXA210 Applications Processor (Sheet Pin Name Type SDCKE[1] OC SDCLK[0] OC SDCLK[1] OCZ nCS[5]/ ICOCZ GPIO[33] nCS[4]/ ICOCZ GPIO[80] nCS[3]/ ICOCZ GPIO[79] nCS[2]/ ICOCZ GPIO[78] nCS[1]/ ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Table 4. Pin and Signal Descriptions for the PXA210 Applications Processor (Sheet Pin Name Type L_DD[9]/ ICOCZ GPIO[67] L_DD[10]/ ICOCZ GPIO[68] L_DD[11]/ ICOCZ GPIO[69] L_DD[12]/ ICOCZ GPIO[70] L_DD[13]/ ICOCZ GPIO[71] L_DD[14]/ ICOCZ ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification Table 4. Pin and Signal Descriptions for the PXA210 Applications Processor (Sheet Pin Name Type Standard UART and ICP Pins IRRXD/ ICOCZ GPIO[46] IRTXD/ ICOCZ GPIO[47] MMC Controller Pins MMCMD ICOCZ MMDAT ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Table 4. Pin and Signal Descriptions for the PXA210 Applications Processor (Sheet Pin Name Type 2 AC97 Controller and I S Controller Pins BITCLK/ ICOCZ GPIO[28] SDATA_IN0/ ICOCZ GPIO[29] SDATA_IN1/ ICOCZ GPIO[32] SDATA_OUT/ ICOCZ ...
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... JTAG is not used, nTRST must be either tied to nRESET or tied low. Intel recommends that a JTAG/Debug port be added to all systems for debug and download. See Chapter 9 in the “Intel® PXA250 and PXA210 Applications Processor Design Guide” for details. JTAG test data input. (input) Data from the JTAG controller is sent to the PXA210 using this pin ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Table 4. Pin and Signal Descriptions for the PXA210 Applications Processor (Sheet Pin Name Type VSSQ SUP VCCN SUP VSSN SUP BATT_VCC SUP Datasheet Signal Descriptions Ground supply for all CMOS I/O except memory bus. Must be connected to the common ground plane on the PCB ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification Figure 3. PXA210 Applications Processor 26 Datasheet ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 PXA210 225-Lead 13x13mm TPBGA Pinout — Ballpad Number Order (Sheet Table 5. Ball # Signal A1 DQM[1] A2 L_DD[14]/GPIO[72] A3 L_DD[10]/GPIO[68] A4 VSSQ A5 L_DD[6]/GPIO[64] A6 L_DD[2]/GPIO[60] A7 L_LCLK/GPIO[75] A8 SSPSCLK/GPIO[23] A9 SSPEXTCLK/GPIO[27] A10 nACRESET A11 PWM[1]/GPIO[17] ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification PXA210 225-Lead 13x13mm TPBGA Pinout — Ballpad Number Order (Sheet Table 5. Ball # Signal C8 VCCQ C9 SDATA_IN0/GPIO[29] C10 PWM[0]/GPIO[16] C11 USB_P J4 MA[4] J5 MA[3] J6 VSSQ J7 VSS J8 VSS J9 VSS J10 VSSQ J11 nRESET J12 nRESET_OUT ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 PXA210 225-Lead 13x13mm TPBGA Pinout — Ballpad Number Order (Sheet Table 5. Ball # Signal L8 MD[6] L9 VSSN L10 MD[11] L11 BATT_VCC L12 GPIO[54] L13 GPIO[55] L14 GPIO[57] 3.2 Package Power Ratings Table 6. and Maximum Power Ratings ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification Table 7. Absolute Maximum Ratings (Sheet Symbol Voltage Applied to XTAL pins (PXTAL, PEXTAL, TXTAL, VIP_X TEXTAL) Maximum ESD stress voltage, Human Body Model; Any pin to any supply pin, either polarity, or Any pin to all non- VESD supply pins together, either polarity ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Table 8. Voltage, Temperature, and Frequency Electrical Specifications (Sheet Symbol Peak Voltage Range (PXA250) VVCC_P VCC, PLL_VCC Voltage, Peak Range fTURBO_P Turbo Mode Frequency, Peak Range External Synchronous Memory fSDRAM_P Frequency, Peak Range 4 ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification 4.4 Targeted AC Specifications All the non-analog input, output, and I/O pins on the applications processor can be divided into one of two categories: 1. High Strength Input, Output, and I/O pins: • nCS[5:1] (GP 33, 80, 79, 78, 15 respectively), nCS[0] • ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 4.5 Oscillator Electrical Specifications The applications processor contains two oscillators: a 32.768 kHz oscillator and a 3.6864 MHz oscillator. Each is for a specific crystal. When choosing a crystal, match the crystal parameters as closely as possible. 4.5.1 32.768 kHz Oscillator Specifications The 32.768 kHz Oscillator is connected between the TXTAL (amplifier input) and TEXTAL (amplified output). The 32.768 kHz specifications are shown in Table 11, “ ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification 4.5.2 3.6864 MHz Oscillator Specifications The 3.6864 MHz Oscillator is connected between the PXTAL (amplifier input) and PEXTAL (amplified output). The 3.6864 MHz specifications are shown in Table 12, “3.6864 MHz Oscillator Specifications”. Table 12. 3.6864 MHz Oscillator Specifications ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 4.6 Reset and Power AC Timing Specifications The applications processor asserts the nRESET_OUT pin in one of several different modes: • Power On • Hardware Reset • Watchdog Reset • GPIO Reset • Sleep Mode The following sections give the timing and specifications for the entry and exit of these modes. ...
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... R_VCC N t D_VCC N t R_VCC t D_VCC Note: nBA T T_F AULT and nVDD_FAULT must be high before nRESET_OUT is Note: nBATT_FAULT and nVDD_FAULT must be high before nRESET_OUT is deasserted or the PXA250 applications processor enters Sleep Mode. deasserted or the Cotulla enters Sleep Mode Description Min 0.01 0. ...
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... Datasheet t t DHW_OUT_A Note: nBA TT_FAULT and nVDD_F AULT must be high before nRESET is deasserted Note: nBATT_FAULT and nVDD_FAULT must be high before nRESET is or the Cotulla will enter Sleep Mode deasserted or the PXA250 applications processor enters Sleep Mode. Description Min 0.001 0 18.1 t A_GP[1] ...
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... Description Min A_GP[ D_PWR_R D_PWR_F Note: nBA TT_FAULT must be high or Cotulla will not exit Sleep Mode Note: nBATT_FAULT must be high or the PXA250 applications processor will not exit Sleep Mode. Typical Max Units - cycles 8 cycles 28 s 380 s t DSM_VCC ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Table 16. Sleep Mode Timing Specifications Symbol Assert Time of GPIO Wake up Source tA_GP[x} (x=[15:0]) Delay from nRESET_OUT asserted to tD_PWR_F PWR_EN deasserted Delay between GP[x] asserted to tD_PWR_R PWR_EN asserted Delay between PWR_EN asserted and tDSM_VCC VCC stable ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification Table 17. SRAM / ROM / Flash / Synchronous Fast Flash AC Specifications (Sheet Symbol Description MD(31:0), DQM(3:0) write data setup to tromDSWH nWE deasserted MD(31:0), DQM(3:0) write data hold tromDH after nWE deasserted nWE high time between beats of write ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Table 19. Card Interface (PCMCIA or Compact Flash) AC Specifications Symbol Description MA(25:0), nPREG, PSKTSEL, nPCE tcardAS setup to nPWE, nPOE, nPIOW, or nPIOR asserted MA(25:0), nPREG, PSKTSEL, nPCE tcardAH hold after nPWE, nPOE, nPIOW, or nPIOR deasserted MD(31:0) setup to nPWE, nPOE, ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification Table 20. Synchronous Memory Interface AC Specifications Symbol SDRAM / SMROM / SDRAM-Timing Synchronous Flash (Synchronous) tsynCLK SDCLK period tsynCMD nSDCAS, nSDRAS, nWE, nSDCS assert time tsynRCD nSDRAS to nSDCAS assert time tsynCAS nSDCAS to nSDCAS assert time ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 4.8.1 LCD Module AC Timing Figure 8 describes the LCD timing parameters. The LCD pin timing specifications are referenced to the pixel clock (L_PCLK). Values for the parameters are given in Table 21. Figure 8. LCD AC Timing Definitions L_PCLK ...
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... PXA250 and PXA210 — Electrical, Mechanical, and Thermal Specification Figure 9. SSP AC Timing Definitions SCLK_C SFRM_C TXD_C RXD_C Table 22. SSP AC Timing Specifications Symbol Tsfmv SCLK_C rise to SFRM_C driven valid Trxds RXD_C valid to SCLK_C fall (input setup) SCLK_C fall to RXD_C invalid (input Trxdh ...
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... Electrical, Mechanical, and Thermal Specification — PXA250 and PXA210 Table 23. Boundary Scan Test Signal Timing (Sheet Symbol Parameter All Outputs (Non-Test) Float TOF2 Delay Input Setup to TCK All Inputs TIS10 (Non-Test) Input Hold from TCK All Inputs TIH8 (Non-Test) 4.9 AC Test Conditions The AC specifications in Section 4.4, “ ...
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