HT68F14 HOLTEK [Holtek Semiconductor Inc], HT68F14 Datasheet - Page 120
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HT68F14
Manufacturer Part Number
HT68F14
Description
Enhanced I/O Flash Type MCU
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
1.HT68F14.pdf
(161 pages)
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HT68F13/HT68F14/HT68F15
Enhanced I/O Flash Type MCU
SCOM Function for LCD
Rev. 1.10
LVD Operation
LCD Operation
The Low Voltage Detector function operates by comparing the power supply voltage, V
pre-specified voltage level stored in the LVDC register. This has a range of between 2.0V and 4.4V.
When the power supply voltage, V
high indicating a low power supply voltage condition. The Low Voltage Detector function is supplied
by a reference voltage which will be automatically enabled. When the device is powered down the low
voltage detector will remain active if the LVDEN bit is high. After enabling the Low Voltage Detector,
a time delay t
that as the V
multiple bit LVDO transitions.
The Low Voltage Detector also has its own interrupt which is contained within one of the
Multi-function interrupts, providing an alternative means of low voltage detection, in addition to
polling the LVDO bit. The interrupt will only be generated after a delay of t
been set high by a low voltage condition. When the device is powered down the Low Voltage Detector
will remain active if the LVDEN bit is high. In this case, the LVF interrupt request flag will be set,
causing an interrupt to be generated if V
device to wake-up from the SLEEP or IDLE Mode, however if the Low Voltage Detector wake up
function is not required then the LVF flag should be first set high before the device enters the SLEEP or
IDLE Mode.
The devices have the capability of driving external LCD panels. The common pins for LCD driving,
SCOM0~ SCOM3, are pin shared with certain pin on the PC0~PC1 and PB6 ~ PB7 pins. The LCD
signals (COM and SEG) are generated using the application program.
An external LCD panel can be driven using this device by configuring the PC0~PC1 or PB6 ~ PB7
pins as common pins and using other output ports lines as segment pins. The LCD driver function is
controlled using the SCOMC register which in addition to controlling the overall on/off function also
controls the bias voltage setup function. This enables the LCD COM driver to generate the necessary
V
DD
/2 voltage levels for LCD 1/2 bias operation.
DD
LVDS
voltage may rise and fall rather slowly, at the voltage nears that of V
should be allowed for the circuitry to stabilise before reading the LVDO bit. Note also
DD
, falls below this pre-determined value, the LVDO bit will be set
120
DD
LCD COM Bias
LVD Operation
falls below the preset LVD voltage. This will cause the
LVD
after the LVDO bit has
February 9, 2011
LVD
, there may be
DD
, with a
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