HT68F14 HOLTEK [Holtek Semiconductor Inc], HT68F14 Datasheet - Page 54
HT68F14
Manufacturer Part Number
HT68F14
Description
Enhanced I/O Flash Type MCU
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
1.HT68F14.pdf
(161 pages)
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Rev. 1.10
Bit 7~0
Bit 7~2
Bit 1~0
Bit 7~0
Name
POR
R/W
Port A Wake-up
I/O Port Control Registers
Bit
Name
Name
POR
POR
R/W
R/W
Bit
Bit
PCPU Register - HT68F15
PDPU Register - HT68F14, HT68F15
PAWU Register
The HALT instruction forces the microcontroller into the SLEEP or IDLE Mode which preserves
power, a feature that is important for battery and other low-power applications. Various methods exist
to wake-up the microcontroller, one of which is to change the logic condition on one of the Port A pins
from high to low. This function is especially suitable for applications that can be woken up via external
switches. Each pin on Port A can be selected individually to have this wake-up feature using the
PAWU register.
Each I/O port has its own control register known as PAC~PDC, to control the input/output
configuration. With this control register, each CMOS output or input can be reconfigured dynamically
under software control. Each pin of the I/O ports is directly mapped to a bit in its associated port
control register. For the I/O pin to function as an input, the corresponding bit of the control register
must be written as 1. This will then allow the logic state of the input pin to be directly read by
instructions. When the corresponding bit of the control register is written as 0, the I/O pin will be setup
as a CMOS output. If the pin is currently setup as an output, instructions can still be used to read the
output register. However, it should be noted that the program will in fact only read the status of the
output data latch and not the actual logic status of the output pin.
R/W
D7
I/O Port C bit 7 ~ bit 0 pull-high control
²¾² Unimplemented, read as ²0²
I/O Port D bit 1 ~ bit 0 pull-high control
PAWU: Port A bit 7 ~ bit 0 wake-up control
7
0
R/W
0: disable
1: enable
0: disable
1: enable
0: disable
1: enable
D7
¾
¾
¾
7
0
7
R/W
D6
R/W
6
0
D6
¾
¾
¾
6
0
6
R/W
D5
R/W
5
0
D5
¾
¾
¾
5
0
5
R/W
D4
54
R/W
4
0
D4
¾
¾
¾
4
0
4
Enhanced I/O Flash Type MCU
HT68F13/HT68F14/HT68F15
R/W
D3
R/W
3
0
D3
¾
¾
¾
3
0
3
R/W
R/W
D2
D2
2
0
¾
¾
¾
2
0
2
R/W
R/W
R/W
D1
D1
D1
1
0
1
0
1
0
February 9, 2011
R/W
R/W
R/W
D0
D0
D0
0
0
0
0
0
0
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