AX88871AP ASIX [ASIX Electronics Corporation], AX88871AP Datasheet - Page 19

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AX88871AP

Manufacturer Part Number
AX88871AP
Description
10/100BASE Dual Speed Bripeater Controller
Manufacturer
ASIX [ASIX Electronics Corporation]
Datasheet
same for LED[2:1].
/HIR_ACTO[0]
/HIR_ACTO[1]
/HIR_ACTO[2]
/HIR_ACTO[3]
/HIR_ACTO[4]
/HIR_ACTO[5]
/HIR_ACTO[6]
/HIR_ACTO[7]
Single chip application (MODE=0)
In this mode, the inter repeater pins are not useful, these pin can be used for display led status directly.
Then the led application become simple.
Notes: a. PART7~0indicates partition status for each port
It must use external shift register to decode data on LED[2:0]. The application shows as follows:
If the user don‘t want to show jabber status, take away the latter 74LS164(#2). The application is the
LED_CK
LED[0]
AX88871AP Bripeater
c. ACT7~0 indicates activity status for each port
e. 10M UTI7~0 indicate global utilization rate of
g. 10M GCOL indicate global collision
i. GPART : indicate global partition.
10Mbps for each 104.8ms sampling period.
Q
D
dump signal
/PART[0]
/PART[1]
/PART[2]
/PART[3]
/PART[4]
/PART[5]
/PART[6]
/PART[7]
Q
Q
74LS164(#1)
Q
Fig - 5 Application for LED display
HIRD[0]
HIRD[1]
HIRD[2]
HIRD[3]
/HIRD_V
/HIRD_ER
HIRD_CK
HIRD_ODIR
Q
Q
Q
dump signal
/ACT[0]
/ACT[1]
/ACT[2]
/ACT[3]
/ACT[4]
/ACT[5]
/ACT[6]
/ACT[7]
19
Q
100Mbps for each 104.8ms sampling period.
d. RID2~0 is the ID of repeater chip
b. JAB7~0 indicates jabber status for each port
f. 100M UTI7~0 indicate global utilization rate of
h. 100M GCOL indicate global collision
Q
D
J. RAM FAIL : Bridge RAM test fail.
LED[0]
LED[1]
LED[2]
LED_CK
HMD
HTX_RDY
DAISY_OUT /LCOL10
/LCOL100
Q
ASIX ELECTRONICS CORPORATION
Q
74LS164(#2)
Q
Q
dump signal
/UTI[0]
/UTI[1]
/UTI[2]
/UTI[3]
/UTI[4]
/UTI[5]
/LCOL100
Q
Q
Q

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