NM9805CV ETC [List of Unclassifed Manufacturers], NM9805CV Datasheet
NM9805CV
Related parts for NM9805CV
NM9805CV Summary of contents
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... MosChip Semiconductor 3335 Kifer Rd, Santa Clara, CA 95051 Nm9805 PCI + 1284 Printer Port Applications Printer server Portable backup units Printer interface Add-on I/O cards Application Notes AN-9805 Ordering Information Commercial Grade Nm9805CV 128-QFP Tel (408) 737-7141 Fax (408) 737-7708 0° +70° C ...
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Nm9805 PCI + 1284 Printer Port CLK P nRESET C I AD0 - AD31 nFRAME, nIRDY I nLOCK, IDSEL nTRDY, nSTOP, E nDEVSEL, nPARR,nSERR R F nC/BE0, nC/BE1, A nC/BE3, nC/BE4 C E nINTA EEprom Interface Page 2 ...
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VCC 1 2 AD28 AD27 3 AD26 4 AD25 5 AD24 6 GND 7 nC/BE3 8 IDSEL 9 VCC 10 AD23 11 AD22 12 AD21 13 AD20 14 AD19 15 16 AD18 AD17 17 AD16 18 VCC 19 GND 20 ...
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Nm9805 PCI + 1284 Printer Port Pin Name 128 Type CLK 122 I nRESET 121 I AD31-29 126-128 I/O AD28-24 2-6 I/O AD23-16 11-18 I/O AD15-11 34-38 I/O AD10-8 40-42 I/O AD7-0 46-53 I/O nFRAME 23 I nIRDY 24 I ...
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Pin Name 128 Type nSERR 30 O PAR 31 I/O nC/BE3 8 I nC/BE2 22 I nC/BE1 32 I nC/BE0 43 I nINTA 120 O EE-CS 115 O EE-CLK 116 O EE-DI 118 I EE-DO 117 O EE-EN 123 I ...
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Nm9805 PCI + 1284 Printer Port Pin Name 128 Type SLCT nBUSY 85 I nACK 86 I nFAULT 83 I nSTROBE 81 I/O nAUTOFDX 80 I/O nINIT 79 I/O nSLCTIN 78 I/O PD7-PD4 98-95 I/O ...
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PCI bus operation: The execution of PCI bus transaction takes place in broadly five stages: address phase; transaction claim- ing; data phase(s); final data transfer; and transaction completion. Address phase: Every PCI transaction starts off with an address phase, one ...
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Nm9805 PCI + 1284 Printer Port Nm9805 configuration space register map AD 31-23 AD 22-16 Device ID (9805) Status Class Code (070102) BIST Header Type I/O (Y)Base Address I/O (W)Base Address Subsystem ID Max Latency (00) Min Grant (00) Page ...
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Printer Register Table REGISTER DPR PD7 DSR nBUSY DCR “0” EPP ADD-7 Address EPP DAT-7 ...
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Nm9805 PCI + 1284 Printer Port Data Register Data register is cleared at initialization by RESET. Dur- ing a write operation, the data register latches the con- tents of the data bus with the rising edge of the nIOW input. ...
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Config-B Register Configuration B register. This register allows software to control the selecting of interrupts. A read-write imple- mentation implies a “software-configurable” device. Reading this register returns the configured interrupt and interrupt pin state value is not set ...
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Nm9805 PCI + 1284 Printer Port Mode “010” FIFO Output Mode In this mode, bytes written to the FIFO are transmitted automatically using the SPP/Centronics standard pro- tocol. Mode “011” Extended Capability Port “ECP” Mode The ECP provides an advanced ...
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Master rest conditions Register BIT-7 BIT-6 BIT-5 DPR DSR DCR EPP C-FIFO CONF CONF ECR Rev. ...
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Nm9805 PCI + 1284 Printer Port Absolute Maximum Ratings Supply Range Voltage at any pin Operating Temperature Storage Temperature Package Dissipation ESD Latch up DC Electrical Specification VCC = 5V 10% unless otherwise ...
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SYMBOL Rev. 1.1 PCI + 1284 Printer Port 128-Pin QFP (14X20) Package 128 MILLIMETERS MIN MAX MIN 0.10 0.30 0.004 2.73 2.97 0.107 ...
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Nm9805 PCI + 1284 Printer Port MosChip Semiconductor Technology, LTD products are not authorized for use as critical components in life sup- port devices or systems. Life support devices are applications that may involve potential risks of death, personal injury ...