P520-17OC PLL [PhaseLink Corporation], P520-17OC Datasheet - Page 4

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P520-17OC

Manufacturer Part Number
P520-17OC
Description
Low Phase Noise VCXO with multipliers (for 65-130MHz Fund Xtal)
Manufacturer
PLL [PhaseLink Corporation]
Datasheet
5. Jitter Specifications
6. Phase Noise Specifications
Note: Phase Noise measured at VCON = 0V
7. CMOS Output Electrical Specifications
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 4
Period jitter RMS
Period jitter peak-to-peak
Integrated jitter RMS
Phase Noise relative
to carrier
Output drive current
(High Drive)
Output drive current
(Standard Drive)
Output Clock Rise/Fall Time
(Standard Drive)
Output Clock Rise/Fall Time
(High Drive)
PARAMETERS
Low Phase Noise VCXO with multipliers (for 65-130MHz Fund Xtal)
PARAMETERS
PARAMETERS
FREQUENCY
155.52MHz
622.08MHz
77.76MHz
77.76MHz
155.52MHz
622.08MHz
77.76MHz
155.52MHz
622.08MHz
Integrated 12 kHz to 20 MHz at 77.76MHz
Integrated 12 kHz to 20 MHz at 155.52MHz
Integrated 12 kHz to 20 MHz at 622.08MHz
SYMBOL
I
I
I
I
OH
OL
OH
OL
@10Hz
V
V
V
V
0.3V ~ 3.0V with 15 pF load
0.3V ~ 3.0V with 15 pF load
CONDITIONS
OH
OL
OH
OL
-75
-75
-75
= V
= V
= 0.4V, V
= 0.4V, V
CONDITIONS
DD
DD
-0.4V, V
-0.4V, V
DD
DD
@100Hz
= 3.3V
= 3.3V
DD
DD
-95
-95
-95
=3.3V
=3.3V
PLL520-17/-18/-19
@1kHz
-120
-125
-115
MIN.
MIN.
30
30
10
10
@10kHz
-145
-125
-118
TYP.
TYP.
2.4
1.2
2.5
0.5
1.5
1.5
24
29
32
4
5
@100kHz
MAX.
-155
-123
-115
MAX.
UNITS
UNITS
UNITS
dBc/Hz
mA
mA
mA
mA
ns
ps
ps
ps

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