88E1111-XX-BAB-C000 MARVELL [Marvell Technology Group Ltd.], 88E1111-XX-BAB-C000 Datasheet - Page 14

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88E1111-XX-BAB-C000

Manufacturer Part Number
88E1111-XX-BAB-C000
Description
Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver
Manufacturer
MARVELL [Marvell Technology Group Ltd.]
Datasheet
Table 2:
Doc. No. MV-S105540-00, Rev. --
Page 14
117-T FBGA
Pi n #
C5
A2
A1
C4
B3
C3
D3
B2
B5
B6
GMII/MII Interfaces (Continued)
96 -BCC
Pin #
86
87
89
90
91
93
92
95
84
83
88E1111 Product Brief
Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver
128 -PQF P
P i n #
120
121
123
124
125
126
128
3
115
114
Document Classification: Proprietary Information
Pin Name
RXD[7]
RXD[6]
RXD[5]
RXD[4]
RXD[3]/RXD[3]
RXD[2]/RXD[2]
RXD[1]/RXD[1]
RXD[0]/RXD[0]
CRS
COL
Pin
Typ e
O, Z
O, Z
O, Z
Desc ription
GMII and MII Receive Data. Symbols
received on the cable are decoded and pre-
sented on RXD[7:0] in 1000BASE-T mode.
In MII mode, RXD[3:0] are used in
100BASE-TX and 10BASE-T modes. In MII
mode, RXD[7:4] are driven low.
RXD[7:0] is synchronous to RX_CLK.
GMII and MII Carrier Sense. CRS asserts
when the receive medium is non-idle. In half-
duplex mode, CRS is also asserted during
transmission. CRS assertion during half-
duplex transmit can be disabled by program-
ming register 16.11 to 0.
GTX_CLK, and TX_CLK.
GMII and MII Collision. In 10/100/
1000BASE-T full-duplex modes, COL is
always low. In 10/100/1000BASE-T half-
duplex modes, COL asserts only when both
the transmit and receive media are non-idle.
In 10BASE-T half-duplex mode, COL is
asserted to indicate signal quality error
(SQE). SQE can be disabled by clearing reg-
ister 16.2 to zero.
COL is asynchronous to RX_CLK,
GTX_CLK, and TX_CLK.
CRS is asynchronous to RX_CLK,
Copyright © 2009 Marvell
March 4, 2009, Advance

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