K9F6408Q0C-H SAMSUNG [Samsung semiconductor], K9F6408Q0C-H Datasheet - Page 27

• Manufacturer Part Number: K9F6408Q0C-H
• Description: 8M x 8 Bit Bit NAND Flash Memory
• Manufacturer: SAMSUNG [Samsung semiconductor]

K9F6408Q0C
K9F6408U0C
READ ID
The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of
00h. Two read cycles sequentially output the manufacture code(ECh), and the device code respectively. The command register
remains in Read ID mode until further commands are issued to it. Figure 9 shows the operation sequence.
Figure 9. Read ID Operation
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase modes, the reset operation will abort these operation. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. Internal address registers are cleared to "0"s and data registers to
"1"s. The command register is cleared to wait for the next command, and the Status Register is cleared to value C0h when WP is
high. Refer to table 3 for device status after reset operation. If the device is already in reset state a new reset command will not be
accepted to by the command register. The R/B pin transitions to low for t
not necessary for normal operation. Refer to Figure 10 below.
Figure 10. RESET Operation
Table3. Device Status
R/B
I/O
CLE
CE
WE
ALE
RE
I/O
0
0
~
~
7
7
Operation Mode
FFh
90h
Address. 1 cycle
00h
t
CLR
After Power-up
Read 1
t
AR1
t
RST
t
CEA
27
tREA
RST
K9F6408Q0C
K9F6408U0C
Device
after the Reset command is written. Reset command is
Maker code
ECh
Waiting for next command
FLASH MEMORY
Device Code*
After Reset
Device code
Device
Code*
E6h
39h