5V9351PFGI IDT, 5V9351PFGI Datasheet - Page 6

no-image

5V9351PFGI

Manufacturer Part Number
5V9351PFGI
Description
Clock Drivers & Distribution 4 Bank PLL Clock Dvr w/PECL Input
Manufacturer
IDT
Datasheet

Specifications of 5V9351PFGI

Rohs
yes
Part # Aliases
IDT5V9351PFGI
DC ELECTRICAL CHARACTERISTICS
T
PLL INPUT REFERENCE CHARACTERISTICS
V
NOTES:
1. V
2. The IDT5V9351 outputs can drive series or paralell terminated 50Ω (or 50Ω to V
NOTE:
1. Maximum and minimum input reference is limited by the VCO lock range and the feedback divider for the TCLK or PECL_CLK inputs.
IDT5V9351
LOW VOLTAGE PLL CLOCK DRIVER
A
CC
Symbol
Symbol
lies within the V
= -40°C to +85°C, V
f
I
REF
V
CMR
Z
CCPLL
V
C
t
V
V
C
V
f
V
I
= 2.5V ± 5%, T
R
I
CMR
REF
OUT
CC
OH
IN
PP
OL
PD
, t
IH
IL
IN
DC
is the difference from the most positive side of the differential input signal. Normal operation is obtained when the HIGH input is within the V
F
Input HIGH Voltage
Input LOW Voltage
Peak-to-Peak Input Voltage
Common Mode
Output HIGH Voltage
Output LOW Voltage
Input Current
Input Capacitance
Output Impedance
Power Dissipation Capacitance
Maximum Quiescent Supply Current
Maximum PLL Supply Current
PP
specification.
A
Parameter
TCLK Input Rise/Fall Levels, 0.7V to 1.7V
Reference Input Frequency
Reference Input Duty Cycle
= -40°C to +85°C
CC
Parameter
= 2.5V ± 5%
(1)
(2)
(2)
(1)
÷
÷
÷
2 feedback
4 feedback
8 feedback
LVCMOS Inputs
LVCMOS Inputs
PECL_CLK
PECL_CLK
I
I
All V
V
OH
OL
CCA
= 15mA
= -15mA
CC
Only
Pins
Test Conditions
CC
/2) transmission lines on the incident edge.
6
Min.
100
50
25
25
Min.
250
1.7
1.8
1
INDUSTRIAL TEMPERATURE RANGE
Max
200
100
50
75
1
17 - 20
Typ.
10
4
3
CMR
V
V
CC
CC
±150
range and the input swing
Max
0.7
0.6
1
5
+ 0.3
- 0.6
MHz
Unit
%
ns
Unit
mA
mA
mV
μA
pF
pF
Ω
V
V
V
V
V

Related parts for 5V9351PFGI