MAX11132ATI+ Maxim Integrated, MAX11132ATI+ Datasheet - Page 20

• Manufacturer Part Number: MAX11132ATI+
• Description: Analog to Digital Converters - ADC 12Bit 8Ch 3Msps Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX11132ATI+

• Rohs: yes
• Number Of Channels: 8/4
• Architecture: SAR
• Conversion Rate: 3 MSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: 72.3 dB
• Interface Type: 3-Wire, QSPI, SPI
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TQFN-28
• Maximum Power Dissipation: 2758 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 1 V

into ADC memory, the pattern may be repeated indefi-
nitely or changed at any time.
For example, the maximum throughput of MAX11129–
MAX11132 is 3Msps. Traditional ADC scan modes allow
up to 16-channel conversions in ascending order. In this
case, the effective throughput per channel is 3Msps/16
channel or 187.5ksps. The maximum input frequency
Figure 9. SampleSet Use-Model Example
Maxim Integrated
ENTRY NO.:
CHANNEL:
100 CYCLES
10 CYCLES
1 CYCLES
100kHz
10kHz
1kHz
AIN2/
AIN3
1
AIN0
2
AIN1
3
AIN0
AIN1
CS
AIN0
2
4
120 CONVERSIONS:
t
S
1
(DEPTH = 256)
AIN0 AND AIN1
= 1/f
SAMPLE SET
1
T
T
S
3
S
ST
S
122
123
124
125
CYCLE
AIN1
4
= 1/3Msps = 333.33ns
5
135
5
f
in
6
256
= 100kHz
2
7
ND
POTENTIAL SampleSet PATTERN
8
CYCLE
9
AIN0
120
10
3Msps, Low-Power, Serial 12-/10-Bit,
11
3
RD
AIN1
12
121
CYCLE
13
14
AIN2/
AIN3
122
15
4
TH
16
SampleSet REPEATS: LENGTH = 256
5µs
CYCLE
5µs
17
AIN4
123
18
19
5
20
TH
AIN5
124
21
CYCLE
22
AIN6
23
125
24
6
TH
25
CYCLE
AIN7
126
26
27
28
7
AIN8
127
TH
29
CYCLE
30
that the ADC can resolve (Nyquist Theorem) is 93.75kHz.
If all 16 channels must be measured, with some chan-
nels having greater than 93.75kHz input frequency, the
user must revert back to manual mode requiring con-
stant communication on the serial interface. SampleSet
technology solves this problem.
SampleSet use-model example.
31
AIN9
128
32
10µs
10µs
8
TH
MAX11129–MAX11132
CYCLE
AIN10
129
AIN11
9
130
TH
8-/16-Channel ADCs
CYCLE
AIN12
131
AIN13
132
AIN14
133
FULLY
DIFFERENTIAL
AIN15
134
ANALOG
INPUTS
AIN2/
AIN3
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
AIN10
AIN11
AIN12
AIN13
135
AIN0
136
Figure 9
120 CONVERSIONS:
AIN1
AIN0 AND AIN1
137
provides a
AIN0
254
AIN1
255
AIN2/
AIN3
256
20