dsPIC33FJ32MC104-I/PT Microchip Technology, dsPIC33FJ32MC104-I/PT Datasheet - Page 136
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dsPIC33FJ32MC104-I/PT
Manufacturer Part Number
dsPIC33FJ32MC104-I/PT
Description
Digital Signal Processors & Controllers - DSP, DSC 16bit Mtr Cnt Fam 16 MIPS 32KBFLSH 2KBRAM
Manufacturer
Microchip Technology
Type
dsPIC33FJ32(GP/MC)101/102/104r
Datasheet
1.DSPIC33FJ32GP102-ISO.pdf
(386 pages)
Specifications of dsPIC33FJ32MC104-I/PT
Rohs
yes
Core
dsPIC33F
Data Bus Width
16 bit
Program Memory Size
32 KB
Data Ram Size
2 KB
Maximum Clock Frequency
7.37 MHz, 32 kHz
Number Of Programmable I/os
35
Number Of Timers
5 x 16-bit, 2 x 32-bit
Device Million Instructions Per Second
16 MIPs
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Package / Case
TQFP-44
Mounting Style
SMD/SMT
Family / Core
dsPIC33FJ32(GP/MC)101/102/104
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
Yes
Product
DSPs
Program Memory Type
Flash
Supply Current
10 mA
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ32MC104-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 136 of 386
- Download datasheet (5Mb)
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
REGISTER 9-1:
REGISTER 9-2:
DS70652E-page 136
bit 3
bit 2-1
bit 0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-11
bit 10
bit 9
bit 8
bit 7-2
bit 1
bit 0
U-0
U-0
—
—
2:
This bit is available in dsPIC33FJ32(GP/MC)10X devices only.
PCFGx bits have no effect if the ADC module is disabled by setting this bit. When the bit is set, all port
pins that have been multiplexed with ANx will be in Digital mode.
SPI1MD: SPI1 Module Disable bit
1 = SPI1 module is disabled
0 = SPI1 module is enabled
Unimplemented: Read as ‘0’
AD1MD: ADC1 Module Disable bit
1 = ADC1 module is disabled
0 = ADC1 module is enabled
Unimplemented: Read as ‘0’
IC3MD: Input Capture 3 Module Disable bit
1 = Input Capture 3 module is disabled
0 = Input Capture 3 module is enabled
IC2MD: Input Capture 2 Module Disable bit
1 = Input Capture 2 module is disabled
0 = Input Capture 2 module is enabled
IC1MD: Input Capture 1 Module Disable bit
1 = Input Capture 1 module is disabled
0 = Input Capture 1 module is enabled
Unimplemented: Read as ‘0’
OC2MD: Output Compare 2 Module Disable bit
1 = Output Compare 2 module is disabled
0 = Output Compare 2 module is enabled
OC1MD: Output Compare 1 Module Disable bit
1 = Output Compare 1 module is disabled
0 = Output Compare 1 module is enabled
U-0
U-0
—
—
PMD1: PERIPHERAL MODULE DISABLE CONTROL REGISTER 1 (CONTINUED)
PMD2: PERIPHERAL MODULE DISABLE CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
U-0
U-0
(2)
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
IC3MD
R/W-0
U-0
—
2011-2012 Microchip Technology Inc.
x = Bit is unknown
OC2MD
IC2MD
R/W-0
R/W-0
OC1MD
IC1MD
R/W-0
R/W-0
bit 8
bit 0
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