dsPIC33FJ32MC104-I/PT Microchip Technology, dsPIC33FJ32MC104-I/PT Datasheet - Page 84

• Manufacturer Part Number: dsPIC33FJ32MC104-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Mtr Cnt Fam 16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32MC104-I/PT

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

program memory, on boundaries of 1536 bytes.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
5.2
The
dsPIC33FJ32(GP/MC)101/102/104 Flash program
memory array is organized into rows of 64 instructions or
192 bytes. RTSP allows the user application to erase a
page of memory, which consists of eight rows
(512 instructions); and to program one word.
shows typical erase and programming times. The 8-row
erase pages are edge-aligned from the beginning of
5.3
A complete programming sequence is necessary for
programming or erasing the internal Flash in RTSP
mode. The processor stalls (waits) until the operation is
finished.
The programming time depends on the FRC accuracy
(see
Tuning register (see
formula to calculate the minimum and maximum values
for the Word Write Time and Page Erase Time (see
Table
EQUATION 5-1:
For example, if the device is operating at +125°C, the
FRC accuracy will be ±2%. If the TUN<5:0> bits (see
Register
write time is equal to
EQUATION 5-2:
The maximum row write time is equal to
EQUATION 5-3:
Setting the WR bit (NVMCON<15>) starts the opera-
tion, and the WR bit is automatically cleared when the
operation is finished.
DS70652E-page 84
T
T
RW
RW
------------------------------------------------------------------------------------------------------------------------- -
7.37 MHz
Table
26-12).
=
=
--------------------------------------------------------------------------------------------- -
7.37 MHz
--------------------------------------------------------------------------------------------- -
7.37 MHz
RTSP Operation
Programming Operations
8-3) are set to ‘b000000, the minimum row
26-18) and the value of the FRC Oscillator
dsPIC33FJ16(GP/MC)101/102


FRC Accuracy




1 0.02
1
Equation
355 Cycles
355 Cycles
Register
PROGRAMMING TIME
MINIMUM ROW WRITE
TIME
MAXIMUM ROW WRITE
TIME
–
+
0.02
T



%

8-3). Use the following
5-2.


1 0.00375
1 0.00375

–
–

FRC Tuning
Equation
Table 26-12


=
=
47.4s
49.3s
%
5-3.
and
5.3.1
Programmers can program one word (24 bits) of
program Flash memory at a time. To do this, it is
necessary to erase the 8-row erase page that contains
the desired address of the location the user wants to
change.
For protection against accidental operations, the write
initiate sequence for NVMKEY must be used to allow
any erase or program operation to proceed. After the
programming command has been executed, the user
application must wait for the programming time until
programming is complete. The two instructions
following the start of the programming sequence
should be NOPs.
Refer to Section 5. “Flash Programming” (DS70191)
in the “dsPIC33F/PIC24H Family Reference Manual”
for details and codes examples on programming using
RTSP.
5.4
Two SFRs are used to read and write the program
Flash memory: NVMCON and NVMKEY.
The NVMCON register
blocks are to be erased, which memory type is to be
programmed, and the start of the programming cycle.
NVMKEY is a write-only register that is used for write
protection. To start a programming or erase sequence,
the user application must consecutively write 0x55 and
0xAA to the NVMKEY register. Refer to
“Programming Operations”
Note:
Control Registers
PROGRAMMING ALGORITHM FOR
FLASH PROGRAM MEMORY
Performing a page erase operation on the
last page of program memory will clear the
Flash
enabling code protection as a result.
Therefore, users should avoid performing
page erase operations on the last page of
program memory.
 2011-2012 Microchip Technology Inc.
Configuration
(Register
for further details.
5-1) controls which
Words,
Section 5.3
thereby