ispLSI 2128A-80LQN160 Lattice, ispLSI 2128A-80LQN160 Datasheet
ispLSI 2128A-80LQN160
Specifications of ispLSI 2128A-80LQN160
Related parts for ispLSI 2128A-80LQN160
ispLSI 2128A-80LQN160 Summary of contents
Page 1
... Features • ENHANCEMENTS — ispLSI 2128A is Fully Form and Function Compatible to the ispLSI 2128, with Identical Timing Specifcations and Packaging — ispLSI 2128A is Built on an Advanced 0.35 Micron E 2 CMOS ® Technology • HIGH DENSITY PROGRAMMABLE LOGIC — 6000 PLD Gates — 128 I/O Pins, Eight Dedicated Inputs — ...
Page 2
Functional Block Diagram Figure 1. ispLSI 2128/A Functional Block Diagram RESET GOE 0 GOE 1 Megablock D7 I I/O 1 I/O 2 I I/O 5 I/O 6 I/O 7 I ...
Page 3
Absolute Maximum Ratings Supply Voltage V ...................................-0.5 to +7.0V cc Input Voltage Applied ........................ -2 Off-State Output Voltage Applied ..... -2 Storage Temperature ................................ -65 to 150°C Case Temp. with Power Applied .............. -55 to 125°C ...
Page 4
... Typical values are and T = 25° Maximum I varies widely with specific device configuration and operating frequency. Refer to the Power Consumption CC section of this data sheet and the Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to estimate maximum Specifications ispLSI 2128/A Figure 2. Test Load GND to 3.0V ≤ ...
Page 5
External Timing Parameters 4 TEST 2 PARAMETER # COND Data Propagation Delay, 4PT Bypass, ORP Bypass pd1 Data Propagation Delay pd2 f max A 3 Clock Frequency with Internal Feedback f max (Ext.) – ...
Page 6
Internal Timing Parameters 2 PARAMETER # Inputs Input Buffer Delay t 21 Dedicated Input Delay din GRP t 22 GRP Delay grp GLB Product Term Bypass Path Delay 4ptbpc Product Term ...
Page 7
Timing Model I/O Cell Ded. In #21 I/O Delay I/O Pin #20 (Input) #45 Reset #43, 44 Y0,1,2 GOE0 Derivations of su, h and co from the Product Term Clock Logic ...
Page 8
Power Consumption Power consumption in the ispLSI 2128 and 2128A de- vices depends on two primary factors: the speed at which the device is operating and the number of Product Terms Figure 4. Typical Device Power Consumption vs fmax I ...
Page 9
Pin Description PQFP/MQFP NAME PIN NUMBERS I I/O 4 26, 28, 29, 25, I I/O 9 32, 33, 34, 35, I I/O 14 37, 38, 39, 40, I I/O 19 46, 42, ...
Page 10
Pin Configuration ispLSI 2128/A 160-Pin PQFP Pinout Diagram 1 GND 2 I/O 114 3 I/O 115 I/O 116 4 5 I/O 117 6 I/O 118 7 I/O 119 8 I/O 120 I/O 121 9 10 GND I/O 122 11 12 ...
Page 11
Pin Configuration ispLSI 2128/A 176-Pin TQFP Pinout Diagram 1 GND 2 I/O 114 3 I/O 115 I/O 116 4 5 I/O 117 I/O 118 6 7 I/O 119 8 I/O 120 9 I/O 121 GND 11 12 ...
Page 12
... ispLSI 2128A-80LT176I Grade Blank = Commercial I = Industrial Package Q = PQFP M = MQFP T = TQFP QN = Lead-Free PQFP TN = Lead-Free TQFP Power L = Low ...
Page 13
... ispLSI 2128A-100LQN160 1 0 ispLSI 2128A-100LTN176 1 5 ispLSI 2128A-80LQN160 1 5 ispLSI 2128A-80LTN176 ispLSI 2128A-80LTN176I Change Summary Previous Lattice release. Updated for lead-free package options. ...