MAX1246BEEE-T Maxim Integrated, MAX1246BEEE-T Datasheet - Page 21

• Manufacturer Part Number: MAX1246BEEE-T
• Description: Analog to Digital Converters - ADC 12-Bit 4Ch 133ksps 3.6V Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1246BEEE-T

• Number Of Channels: 4/2
• Architecture: SAR
• Conversion Rate: 133 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Differential
• Snr: 70 dB
• Interface Type: 4-Wire (SPI, Microwire, QSPI, TMS320)
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QSOP-16
• Maximum Power Dissipation: 667 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 2.5 V

Figure 20 shows an application circuit to interface the
MAX1246/MAX1247 to the TMS320 in external clock
mode. The timing diagram for this interface circuit is
shown in Figure 21.
Use the following steps to initiate a conversion in the
MAX1246/MAX1247 and to read the results:
1) The TMS320 should be configured with CLKX
2) The MAX1246/MAX1247’s CS pin is driven low by
3) An 8-bit word (1XXXXX11) should be written to the
Figure 17. Bipolar Transfer Function, Full Scale (FS) =
VREF / 2 + COM, Zero Scale (ZS) = COM
*COM
(transmit clock) as an active-high output clock and
CLKR (TMS320 receive clock) as an active-high
input clock. CLKX and CLKR on the TMS320 are
tied together with the MAX1246/MAX1247’s SCLK
input.
the TMS320’s XF_ I/O port to enable data to be
clocked into the MAX1246/MAX1247’s DIN.
MAX1246/MAX1247 to initiate a conversion and
place the device into external clock mode. Refer to
Table 1 to select the proper XXXXX bit values for
your specific application.
011 . . . 111
011 . . . 110
000 . . . 010
000 . . . 001
000 . . . 000
111 . . . 111
111 . . . 110
111 . . . 101
100 . . . 001
100 . . . 000
≤
VREF / 2
OUTPUT CODE
-FS =
1LSB =
- FS
FS = VREF
ZS = COM
-VREF
______________________________________________________________________________________
2
2
VREF
4096
+ COM
+ COM
TMS320LC3x Interface
INPUT VOLTAGE (LSB)
COM*
Serial 12-Bit ADCs in QSOP-16
+2.7V, Low-Power, 4-Channel,
+FS - 1LSB
4) The MAX1246/MAX1247’s SSTRB output is moni-
5) The TMS320 reads in one data bit on each of the
6) Pull CS high to disable the MAX1246/MAX1247 until
Figure 18. Power-Supply Grounding Connection
R* = 10Ω
tored via the TMS320’s FSR input. A falling edge on
the SSTRB output indicates that the conversion is in
progress and data is ready to be received from the
MAX1246/MAX1247.
next 16 rising edges of SCLK. These data bits rep-
resent the 12-bit conversion result followed by four
trailing bits, which should be ignored.
the next conversion is initiated.
*OPTIONAL
V
+3V
DD
AGND
MAX1246
MAX1247
SUPPLIES
COM
DGND
+3V
+3V
CIRCUITRY
DIGITAL
DGND
GND
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