MAX1303BEUP-T Maxim Integrated, MAX1303BEUP-T Datasheet - Page 24

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MAX1303BEUP-T

Manufacturer Part Number
MAX1303BEUP-T
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1303BEUP-T

Number Of Channels
4/2
Architecture
SAR
Conversion Rate
115 KSPs
Resolution
16 bit
Input Type
Single-Ended/Differential
Snr
90 dB
Interface Type
Microwire, QSPI, Serial, SPI
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-24
Maximum Power Dissipation
879 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
Internal, External
When M[2:0] = 111, the device enters full power-down
mode and the total supply current falls to 1µA (typ). In full
power-down, all analog portions of the device are powered
down. When using the internal reference, upon exiting full
power-down mode, allow 10ms for the internal reference
voltage to stabilize prior to initiating a conversion.
To exit full power-down, change the mode by issuing
one of the following mode-control bytes (see the Mode
Control section):
• External-clock-mode control byte
• External-acquisition-mode control byte
• Internal-clock-mode control byte
• Reset byte
• Partial power-down-mode control byte
This prevents the MAX1303 from inadvertently exiting
full power-down mode because of a CS glitch in a noisy
digital environment.
The MAX1303 powers up in normal operation config-
ured for external clock mode with all circuitry active
(Tables 7 and 8). Each analog input channel
(CH0–CH7) is set for single-ended conversions with a
±V
Allow the power supplies to stabilize after power-up. Do
not initiate any conversions until the power supplies
have stabilized. Additionally, allow 10ms for the internal
reference to stabilize when C
= 0.1µF. Larger reference capacitors require longer
stabilization times.
The MAX1303 operates with either an internal or external
reference. The reference voltage impacts the ADC’s FSR
(Figures 11, 12, and 13). An external reference is recom-
mended if more accuracy is required than the internal ref-
erence provides, and/or multiple converters require the
same reference voltage.
4-Channel, ±V
Serial 16-Bit ADC
Table 8. Mode-Control Bits M[2:0]
24
REF
______________________________________________________________________________________
M2
0
0
0
0
1
1
1
1
bipolar input range (Table 6).
Internal or External Reference
M1
0
0
1
1
0
0
1
1
Full Power-Down Mode (Mode 7)
REF
M0
0
1
0
1
0
1
0
1
REF
= 1.0µF and C
Power-On Reset
External Clock (DEFAULT)
External Acquisition
Internal Clock
Reserved
Reset
Reserved
Partial Power-Down
Full Power-Down
Multirange Inputs,
RECAP
The MAX1303 contains an internal 4.096V bandgap refer-
ence. This bandgap reference is connected to REFCAP
through a nominal 5kΩ resistor (Figure 16). The voltage at
REFCAP is buffered creating 4.096V at REF. When using
the internal reference, bypass REFCAP with a 0.1µF or
greater capacitor to AGND1 and bypass REF with a
1.0µF or greater capacitor to AGND1.
For external reference operation, disable the internal
reference and reference buffer by connecting REFCAP
to AVDD1. With AVDD1 connected to REFCAP, REF
becomes a high-impedance input and accepts an
external reference voltage. The MAX1303 external ref-
erence current varies depending on the applied refer-
ence voltage and the operating mode (see the External
Reference Input Current vs. External Reference Input
Voltage in the Typical Operating Characteristics ).
Figure 16. Internal Reference Operation
MAX1303
ADC REF
SAR
REFERENCE
BANDGAP
4.096V
MODE
5kΩ
4.096V
1x
External Reference
Internal Reference
V
REFCAP
RCTH
AGND1
REF
1.0µF
0.1µF

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