S9S12G240F0CLFR Freescale Semiconductor, S9S12G240F0CLFR Datasheet - Page 675
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S9S12G240F0CLFR
Manufacturer Part Number
S9S12G240F0CLFR
Description
16-bit Microcontrollers - MCU 16BIT 240KB FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G240F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
240 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12G240F0CLFR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- Current page: 675 of 1292
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20.3.2.7
The SCISR1 and SCISR2 registers provides inputs to the MCU for generation of SCI interrupts. Also,
these registers can be polled by the MCU to check the status of these bits. The flag-clearing procedures
require that the status register be read followed by a read or write to the SCI data register.It is permissible
to execute other instructions between the two steps as long as it does not compromise the handling of I/O,
but the order of operations is important for flag clearing.
Read: Anytime
Write: Has no meaning or effect
Freescale Semiconductor
Module Base + 0x0004
Reset
Field
RWU
SBK
1
0
W
R
TDRE
Receiver Wakeup Bit — Standby state
0 Normal operation.
1 RWU enables the wakeup function and inhibits further receiver interrupt requests. Normally, hardware wakes
Send Break Bit — Toggling SBK sends one break character (10 or 11 logic 0s, respectively 13 or 14 logics 0s
if BRK13 is set). Toggling implies clearing the SBK bit before the break character has finished transmitting. As
long as SBK is set, the transmitter continues to send complete break characters (10 or 11 bits, respectively 13
or 14 bits).
0 No break characters
1 Transmit break characters
SCI Status Register 1 (SCISR1)
1
7
the receiver by automatically clearing RWU.
TC
= Unimplemented or Reserved
1
6
Table 20-10. SCICR2 Field Descriptions (continued)
Figure 20-10. SCI Status Register 1 (SCISR1)
MC9S12G Family Reference Manual, Rev.1.23
RDRF
0
5
IDLE
0
4
Description
OR
0
3
Serial Communication Interface (S12SCIV5)
NF
0
2
FE
0
1
PF
0
0
677
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