S912XEQ512J3CAGR Freescale Semiconductor, S912XEQ512J3CAGR Datasheet - Page 324

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S912XEQ512J3CAGR

Manufacturer Part Number
S912XEQ512J3CAGR
Description
16-bit Microcontrollers - MCU 16 BIT,512K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEQ512J3CAGR

Rohs
yes
Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 kB
Data Ram Size
32 kB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
Interface Type
CAN/SCI/SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEQ512J3CAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 8 S12X Debug (S12XDBGV3) Module
8.3.2.8.3
Read: Anytime. See
Write: If DBG not armed. See
8.3.2.8.4
Read: Anytime. See
Write: If DBG not armed. See
324
Address: 0x002A
Address: 0x002B
Bit[15:8]
Bits[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
Bit 15
Comparator Address Mid Compare Bits— The Comparator address mid compare bits control whether the
selected comparator will compare the address bus bits [15:8] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
Bit 7
Comparator Address Low Compare Bits — The Comparator address low compare bits control whether the
selected comparator will compare the address bus bits [7:0] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
0
0
7
7
Debug Comparator Address Mid Register (DBGXAM)
Debug Comparator Address Low Register (DBGXAL)
Figure 8-16. Debug Comparator Address Mid Register (DBGXAM)
Figure 8-17. Debug Comparator Address Low Register (DBGXAL)
Table 8-29
Table 8-29
Bit 14
Bit 6
0
0
6
6
Table 8-29
Table 8-29
MC9S12XE-Family Reference Manual Rev. 1.25
for visible register encoding.
for visible register encoding.
Table 8-33. DBGXAM Field Descriptions
Table 8-34. DBGXAL Field Descriptions
Bit 13
Bit 5
0
0
5
5
for visible register encoding.
for visible register encoding.
Bit 12
Bit 4
0
0
4
4
Description
Description
Bit 11
Bit 3
0
0
3
3
Bit 10
Bit 2
0
0
2
2
Freescale Semiconductor
Bit 9
Bit 1
0
0
1
1
Bit 8
Bit 0
0
0
0
0

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