C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 170
C8051F966-A-GQ
Manufacturer Part Number
C8051F966-A-GQ
Description
8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F966-A-GQ
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
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C8051F96x
13.3. CRC Seed Value
Normally, the initial value or the CRC results is cleared to 0x0000. However, a CRC might be specified with
an initial value preset to all ones (0xFFFF).
The steps to preset the CRC with all ones is as follows:
The CRC1 module is now ready to calculate a CRC using a CRC seed value of 0xFFFF.
13.4. Inverting the Final Value
Sometimes it is necessary to invert the final value. This will take the ones complement of the final result.
The steps to flip the final CRC results are as follows:
Clear the FLIP bit in the CRC1CN SFR.
13.5. Flipping the Final Value
The steps to flip the final CRC results are as follows:
The flip operation will exchange bit 15 with bit 0, bit 14 with bit 1, bit 13 with bit 2, and so on.
170
1. Set the SEED bit to 1.
2. Reset the CRC1 module by setting the CLR bit to 1 in CRC1CN.
3. Clear the SEED bit to 0.
1. Clear the CRC module by setting the CLR bit in CRC1CN SFR.
2. Write the polynomial to CRC1POLH:L.
3. Write all data bytes to CRC1IN.
4. Set the INV bit in the CRC1CN SFR to invert the final results.
5. Read the final CRC results from CRC1OUTH:L.
1. Clear the CRC module by setting the CLR bit in CRC1CN SFR.
2. Write the polynomial to CRC1POLH:L.
3. Write all data bytes to CRC1IN.
4. Set the FLIP bit in the CRC1CN SFR to flip the final results.
5. Read the final CRC results from CRC1OUTH:L.
6. Clear the FLIP bit in the CRC1CN SFR.
Rev. 0.5
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