SiM3C167-B-GM Silicon Labs, SiM3C167-B-GM Datasheet - Page 33

• Manufacturer Part Number: SiM3C167-B-GM
• Description: ARM Microcontrollers - MCU 256KB LGA92
• Manufacturer: Silicon Labs

Specifications of SiM3C167-B-GM

• Rohs: yes
• Core: ARM Cortex M3
• Processor Series: SIM3C1xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 80 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 47 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LGA-92
• Mounting Style: SMD/SMT
• Interface Type: 2 x I2C, I2S, 3 x SPI, 2 x USART, 2 x UART
• Number Of Programmable I/os: 80
• Number Of Timers: 17 x 32 bit
• Supply Voltage - Max: 3.6 V

volatile data storage and allowing field upgrades of the firmware. User firmware has complete control of all
peripherals and may individually shut down and gate the clocks of any or all peripherals for power savings.
The on-chip debugging interface (SWJ-DP) allows non-intrusive (uses no on-chip resources), full speed, in-circuit
debugging using the production MCU installed in the final application. This debug logic supports inspection and
modification of memory and registers, setting breakpoints, single stepping, and run and halt commands. All analog
and digital peripherals are fully functional while debugging.
Each device is specified for 1.8 to 3.6 V operation over the industrial temperature range (–40 to +85 °C). The Port
I/O and RESET pins are powered from the IO supply voltage. The SiM3C1xx devices are available in 40-pin or 64-
pin QFN, 64-pin or 80-pin TQFP, or 92-pin LGA packages. All package options are lead-free and RoHS compliant.
See Table 5.1 for ordering information. A block diagram is included in Figure 4.1.
DMA access available for these peripherals
External Oscillator Control (EXTOSC0)
External Regulator (EXTVREG0)
Power Management Unit (PMU)
Low Dropout Regulator (LDO0)
Peripheral Clock Control (CLKCTRL)
Low Frequency Oscillator (LFOSC0)
Voltage Regulator (VREG0)
Low Power Oscillator (LPOSC0)
Phase-Locked Loop (PLL0OSC)
Real-Time Clock (RTC0OSC)
Power On Reset /
Monitor (VMON0)
Voltage Supply
(WDTIMER0)
Watchdog
Power
Timer
PMU
Clocking
Figure 4.1. Precision32™ SiM3C1xx Family Block Diagram
Programming
Hardware
Debug /
32/64/128/256 kB Flash
16-Channel Controller
Peripheral Crossbar
4 kB retention RAM
4/12/28 kB RAM
ARM Cortex M3
Memory
Clock Control
Core
DMA
Rev.1.0
USART0
Low Power Timer (LPTIMER0)
Comparator 0 Comparator 1
EPCA0
SPI0
SARADC0
Timer 0
IDAC0
Capacitive Sensing 0
I2C0
Standard I/O pins
5 V tolerant pins
High Drive pins
USART1
Crossbars
Analog
Digital
CRC0
PCA0
AES0
EMIF
IVC0
SPI1
I2S0
I/O
UART0
SARADC1
IDAC1
Timer 1
I2C1
SiM3C1xx
PCA1
SPI2
UART1
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