SIM3U146-B-GM Silicon Labs, SIM3U146-B-GM Datasheet - Page 40
SIM3U146-B-GM
Manufacturer Part Number
SIM3U146-B-GM
Description
ARM Microcontrollers - MCU ARM Cortex-M3 USB 64KB QFN64
Manufacturer
Silicon Labs
Datasheet
1.SIM3U146-B-GM.pdf
(94 pages)
Specifications of SIM3U146-B-GM
Rohs
yes
Core
ARM Cortex M3
Processor Series
SIM3U1xx
Data Bus Width
32 bit
Maximum Clock Frequency
80 MHz
Program Memory Size
64 KB
Data Ram Size
32 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-64
Mounting Style
SMD/SMT
Interface Type
2 x I2C, I2S, 3 x SPI, 2 x USART, 2 x UART
Number Of Programmable I/os
65
Number Of Timers
2 x 32 bit
Supply Voltage - Max
3.6 V
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SiM3U1xx
4.3. Clocking
The SiM3U1xx devices have two system clocks: AHB and APB. The AHB clock services memory peripherals and
is derived from one of seven sources: the RTC0 timer clock (RTC0TCLK), the Low Frequency Oscillator, the Low
Power Oscillator, the divided Low Power Oscillator, the External Oscillator, the PLL0 Oscillator, and the USB0
Oscillator. In addition, a divider for the AHB clock provides flexible clock options for the device. The APB clock
services data peripherals and is synchronized with the AHB clock. The APB clock can be equal to the AHB clock (if
AHB is less than or equal to 50 MHz) or set to the AHB clock divided by two.
Clock Control allows the AHB and APB clocks to be turned off to unused peripherals to save system power. Any
registers in a peripheral with disabled clocks will be unable to be accessed until the clocks are enabled. Most
peripherals have clocks off by default after a power-on reset.
40
RTC0TCLK
Oscillator
Oscillator
Oscillator
LFOSC0
LPOSC0
External
USB0
PLL0
AHB Clock
APB Clock
Divider
Divider
Clock Control
Rev. 1.0
APB clock
PLL0 Registers
PBCFG and
PB0/1/2/3/4
AHB clock
USART0
USART1
UART0
USB Buffer
Flash
EMIF
RAM
DMA
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