SIM3L158-C-GM Silicon Labs, SIM3L158-C-GM Datasheet - Page 44

• Manufacturer Part Number: SIM3L158-C-GM
• Description: ARM Microcontrollers - MCU 128KB, DC-DC, 40x4 LCD, AES, LGA92
• Manufacturer: Silicon Labs

Specifications of SIM3L158-C-GM

• Rohs: yes
• Core: ARM Cortex M3
• Processor Series: SiM3L1xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.8 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• Interface Type: I2C, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 3
• On-chip Dac: Yes
• Program Memory Type: Flash
• Supply Voltage - Max: 3.8 V
• Supply Voltage - Min: 1.8 V

SiM3L1xx
4.6. Counters/Timers
4.6.1. 32-bit Timer (TIMER0, TIMER1, TIMER2)
Each timer module is independent, and includes the following features:
TIMER0 and TIMER1 have the following features:
TIMER2 does not support the standard input/output features of TIMER0 and TIMER1. The TIMER2 EX signal is
internally connected to the outputs of the PVTOSC0 oscillators. TIMER2 can use any of the counting modes that
use EX as an input, including up/down mode, edge capture mode, and pulse capture mode. The TIMER2 CT signal
is disconnected.
4.6.2. Enhanced Programmable Counter Array (EPCA0)
The Enhanced Programmable Counter Array (EPCA0) module is a timer/counter system allowing for complex
timing or waveform generation. Multiple modules run from the same main counter, allowing for synchronous output
waveforms.
This module includes the following features:
44

















Operation as a single 32-bit or two independent 16-bit timers.
Clocking options include the APB clock, the APB clock scaled using an 8-bit prescaler, the external
oscillator, or falling edges on an external input pin (synchronized to the APB clock).
Auto-reload functionality in both 32-bit and 16-bit modes.
Up/Down count capability, controlled by an external input pin.
Rising and falling edge capture modes.
Low or high pulse capture modes.
Period and duty cycle capture mode.
Square wave output mode, which is capable of toggling an external pin at a given rate with 50% duty cycle.
32- or 16-bit pulse-width modulation mode.
Three sets of channel pairs (six channels total) capable of generating complementary waveforms.
Center- and edge-aligned waveform generation.
Programmable dead times that ensure channel pairs are never active at the same time.
Programmable clock divisor and multiple options for clock source selection.
Waveform update scheduling.
Option to function while the core is inactive.
Multiple synchronization triggers.
Pulse-Width Modulation (PWM) waveform generation.
Rev 0.5